74LV123 Philips, 74LV123 Datasheet - Page 2

• Manufacturer Part Number: 74LV123
• Description: Dual retriggerable monostable multivibrator with reset
• Manufacturer: Philips

1. C
Philips Semiconductors
FEATURES
QUICK REFERENCE DATA
GND = 0V; T
NOTES:
ORDERING INFORMATION
t
C
C
16-Pin Plastic DIL
16-Pin Plastic SO
16-Pin Plastic SSOP Type II
16-Pin Plastic TSSOP Type I
1998 Apr 28
PHL
Optimized for Low Voltage applications: 1.0 to 5.5V
Accepts TTL input levels between V
Typical V
T
Typical V
T
DC triggered from active HIGH or active LOW inputs
Retriggerable for very long pulses up to 100% duty factor
Direct reset terminates output pulses
Schmitt-trigger action on all inputs except for the reset input
Output capability: standard (except for nR
I
Dual retriggerable monostable multivibrator
with reset
I
PD
CC
P
f
f
S (C
amb
amb
i
o
PD
D
= input frequency in MHz; C
SYMBOL
/t
= output frequency in MHz; V
category: MSI
PLH
= C
= 25 C
= 25 C
L
is used to determine the dynamic power dissipation (P
PD
OLP
OHV
V
amb
PACKAGES
CC
(output ground bounce) t 0.8V @ V
(output V
V
2
= 25 C; t
CC
2
f
Propagation delay
nA, nB to nQ, nQ
nR
Input capacitance
Power dissipation capacitance per monost-
able
o
) = sum of the outputs.
D
OH
f
r
i
to nQ, nQ
)S (C
= t
undershoot) u 2V @ V
f
v2.5 ns
L
L
= output load capacitance in pF;
CC
PARAMETER
CC
V
= supply voltage in V;
TEMPERATURE RANGE
CC
= 2.7V and V
2
EXT
–40 C to +125 C
–40 C to +125 C
–40 C to +125 C
–40 C to +125 C
f
/C
o
) where:
EXT
CC
CC
)
CC
= 3.3V,
= 3.3V,
= 3.6V
D
in W)
C
V
R
C
V
OUTSIDE NORTH AMERICA
CC
CC
L
EXT
EXT
= 15pF
2
= 3.3V
= 3.3V, V
= 5K
= 0pF
DESCRIPTION
The 74LV123 is a low-voltage Si-gate CMOS device and is pin and
function compatible with the 74HC/HCT123.
The 74LV123 is a dual retriggerable monostable multivibrator with
output pulse width control by three methods. The basic pulse time is
programmed by selection of an external resistor (R
capacitor (C
Figure 1. Once triggered, the basic output pulse width may be
extended by retriggering the gated active LOW-going edge input
(nA) or the active HIGH-going edge input (nB). By repeating this
process, the output pulse period (nQ = HIGH, nQ = LOW) can be
made as long as desired. Alternatively, an output delay can be
terminated at any time by a LOW-going edge on input nR
also inhibits the triggering. Figures 1 and 2 illustrate pulse control by
retriggering and early reset. The basic output pulse width is
essentially determined by the values of the external timing
components R
see Figure 5. When C
width is defined as: t
t
C
nB inputs makes the circuit highly tolerant of slower input rise and
fall times.
W
74LV123 PW
74LV123 DB
EXT
CONDITIONS
74LV123 N
74LV123 D
= pulse width in ns; R
= external capacitor in pF. Schmitt-trigger action in the nA and
I
= GND to V
EXT
EXT
). They are normally connected as shown in
and C
CC
EXT
1
W
= 0.45
EXT
EXT
u 10,000pF, the typical output pulse
NORTH AMERICA
74LV123PW DH
. For pulse width when C
= external resistor in K ; and
74LV123 DB
74LV123 N
74LV123 D
TYPICAL
R
EXT
3.5
25
20
60
C
EXT
Product specification
(typ.), where
74LV123
853–1911 19290
EXT
PKG. DWG. #
SOT109-1
SOT338-1
SOT403-1
EXT
SOT38-1
) and
D
UNIT
<10000pF,
, which
ns
ns
pF
pF