PCF85116-3P Philips Semiconductors, PCF85116-3P Datasheet - Page 9
PCF85116-3P
Manufacturer Part Number
PCF85116-3P
Description
2048 x 8-bit CMOS EEPROM with I2C-bus interface
Manufacturer
Philips Semiconductors
Datasheet
1.PCF85116-3P.pdf
(20 pages)
Philips Semiconductors
8.5
Read operations are initiated in the same manner as write
operations with the exception that the LSB of the slave
address (R/W) is set to logic 1. There are three basic read
operations; current address read, random read and
sequential read.
1997 Apr 02
handbook, full pagewidth
handbook, full pagewidth
2048
interface
Read operations
S
SLAVE ADDRESS
Fig.7 Master reads PCx85116-3 slave after setting word address (write word address; read data).
8-bit CMOS EEPROM with I
B
Fig.8 Master reads PCx85116-3 immediately after first byte (read mode).
B
S
SLAVE ADDRESS
B
acknowledge
R/W
from slave
0 A
WORD ADDRESS
B
B
B
acknowledge
R/W
from slave
1 A
acknowledge
from slave
at this moment master
transmitter becomes
master receiver and
EEPROM slave receiver
becomes slave transmitter
A
n bytes
2
S
DATA
SLAVE ADDRESS
C-bus
9
8.5.1
During read operations all bits of the memory address are
incremented after each transmission of a data byte.
Contrary to write operations an overflow of the memory
address occurs from 2047 to 0 (see Fig.3).
auto increment
word address
acknowledge
from master
A
B
R
B
EMARK
B
acknowledge
R/W
from slave
last bytes
1
DATA
MBH928
A
auto increment
word address
no acknowledge
from master
n bytes
DATA
MBH929
1
last byte
P
auto increment
word address
DATA
acknowledge
from master
PCF85116-3
Product specification
auto increment
A
word address
no acknowledge
from master
1
P