SAA7102 Philips Semiconductors, SAA7102 Datasheet
SAA7102
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SAA7102 Summary of contents
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... DATA SHEET SAA7102; SAA7103 Digital video encoder Product specification File under Integrated Circuits, IC22 INTEGRATED CIRCUITS 2001 Sep 25 ...
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... Oscillator and Discrete Time Oscillator (DTO) 7.11 Low-pass Clock Generation Circuit (CGC) 7.12 Encoder 7.13 RGB processor 7.14 Triple DAC 7.15 Timing generator 2 7.16 I C-bus interface 7.17 Programming the SAA7102; SAA7103 7.18 Input levels and formats 7.19 Bit allocation map 2 7.20 I C-bus format 7.21 Slave receiver 7.22 Slave transmitter 8 BOUNDARY SCAN TEST 8.1 Initialization of boundary scan circuit 8 ...
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... Optional support of various Vertical Blanking Interval (VBI) data insertion Macrovision Pay-per-View copy protection system rev. 7.01 and rev. 6.1 as option; this applies to SAA7102 only. The device is protected by USA patent numbers 4631603, 4577216 and 4819098 and other intellectual property rights. Use of the Macrovision anti-copy process in the device is licensed for non-commercial home use only ...
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... Sep 25 PACKAGE DESCRIPTION plastic ball grid array package; 156 balls; body 15 15 1.15 mm plastic quad flat package; 44 leads (lead length 1.3 mm); body 10 10 1.75 mm PARAMETER load (peak-to-peak value) 4 Product specification SAA7102; SAA7103 VERSION SOT472-1 SOT307-2 MIN. TYP. MAX. 3.15 3.3 3.45 3.0 3.3 3.6 1 110 140 ...
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... RGB TO Y CURSOR RGB LUT MATRIX INSERTION (OR BYPASS) (OR BYPASS) VERTICAL HORIZONTAL SCALER AND FIFO SCALER ANTI-FLICKER FILTER VIDEO TRIPLE ENCODER DAC SAA7102H SAA7103H 2 OSCILLATOR/ TIMING I C-BUS DTO GENERATOR CONTROL XTALI XTAL VSVGC HSVGC SDA ...
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... GREEN or VBS or CVBS signal 29 S analog supply voltage 1 (3.3 V for DACs analog output of BLUE Product specification SAA7102; SAA7103 DESCRIPTION -Y see Tables for pin R -Y see Tables for R -Y see Tables for ...
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... MSB 1 with C B assignment 44 I MSB with C -Y-C B assignment 7 Product specification SAA7102; SAA7103 DESCRIPTION resistor to analog -Y see Tables for pin R -Y see Tables for pin R -Y see Tables for pin see Tables for pin ...
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... Philips Semiconductors Digital video encoder Table 1 Pin assignment SAA7102E; SAA7103E (top view PD7 PD4 TRST B PD9 PD8 PD5 PD6 C PD11 PD10 TTX_ TTXRQ_ SRES XCLKO2 D TDO RESET TMS V DDD2 E TCLK SCL HSVGC V SSD1 F VSVGCPIXCLKI PD3 V DDD1 G FSVGC SDA CBO PIXCLKO ...
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... SAA7102E H SAA7103E Fig.2 Pin configuration (SAA7102E; SAA7103E). SAA7102H SAA7103H Fig.3 Pin configuration (SAA7102H; SAA7103H). 9 Product specification SAA7102; SAA7103 MHB907 33 V SSA1 32 DUMP 31 RSET 30 BLUE_CB_CVBS 29 V DDA1 28 GREEN_VBS_CVBS 27 RED_CR_C ...
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... NTSC M, PAL B/G and sub-standards R B are supported. The SAA7102; SAA7103 can be directly connected video graphics controller with a maximum resolution of 800 600 frame rate. A programmable scaler scales the computer graphics picture so that it will fit into a standard TV screen with an adjustable underscan area ...
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... Table 3 Layout of a byte in the cursor bit map D7 pixel C-bus control 11 Product specification SAA7102; SAA7103 is being applied Mbyte/s data stream C-bus write access 3 bytes for the R, G and B LUT are 2 C-bus register as described in Table ...
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... A special case is column 9 column 8 XINC = 0, this sets the scaling factor the SAA7102; SAA7103 input data is in accordance with ... ... “ITU-R BT.656” , the scaler enters another mode. In this row 0 row 0 event, XINC needs to be set to 2048 for a scaling factor ...
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... At each rising edge of the output signal (TTXRQ) a single teletext bit has to be provided after a programmable delay at input pin baseband signals, R TTX_SRES. 13 Product specification SAA7102; SAA7103 and C ), and a standard dependent ELETEXT INSERTION AND ENCODING - SIMULTANEOUSLY WITH REAL ...
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... I C-bus status byte reflects whether a load is applied or not. If the SAA7102; SAA7103 is required to drive a second (auxiliary) VGA monitor, the DACs receive the signal directly from the cursor insertion block. In this event, the DACs are clocked at the incoming PIXCLKI instead of the 27 MHz crystal clock used in the video encoder. ...
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... The I C-bus slave address is defined as 88H. 7.17 Programming the SAA7102; SAA7103 In order to program the SAA7102; SAA7103 it is first necessary to determine the input and output field timings. The timings are controlled by decoding binary counters that index the position in the current line and field respectively ...
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... The (60 Hz) corresponding horizontal resolution is 620 pixels. Overscan is only possible with an input resolution of (50 Hz) 800 settings are given on the last lines of the tables. OutPix XINC ----------------- - 4096 = InPix 16 Product specification SAA7102; SAA7103 OutLin YSKIP = --------------------- - 1 + ---------------- - 4096 InLin 2 + 4095 YINC = ...
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... Digital video encoder 7.18 Input levels and formats The SAA7102; SAA7103 accepts digital Y, C “ITU-R BT.601” ; see Table 23. For C and CVBS outputs, deviating amplitudes of the colour difference signals can be compensated for by independent gain control setting, while gain for luminance is set to predefined values, distinguishable for 7.5 IRE set-up or without set-up ...
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... Product specification SAA7102; SAA7103 400, half anti-flicker filter YOFSO YOFSE YIWGTO 52 52 3668 56 56 3668 60 60 3668 64 64 3668 67 67 3668 50 50 ...
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... Product specification SAA7102; SAA7103 400, no anti-flicker filter YOFSO YOFSE YIWGTO 52 52 4092 56 56 4092 60 60 4092 64 64 4092 68 68 4092 50 50 ...
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... Product specification SAA7102; SAA7103 480, full anti-flicker filter YOFSO YOFSE YIWGTO 63 63 2948 67 67 2948 72 72 2948 77 77 2948 81 81 2948 60 60 2957 65 ...
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... Product specification SAA7102; SAA7103 480, half anti-flicker filter YOFSO YOFSE YIWGTO 63 63 3399 67 67 3399 72 72 3399 77 77 3399 81 81 3399 60 60 ...
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... Product specification SAA7102; SAA7103 480, no anti-flicker filter YOFSO YOFSE YIWGTO 63 64 3849 68 69 3849 72 73 3849 77 78 3849 81 82 3849 60 61 ...
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... Product specification SAA7102; SAA7103 600, full anti-flicker filter YOFSO YOFSE YIWGTO 79 79 2769 84 84 2769 90 90 2769 96 96 2769 102 102 2769 75 75 ...
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... Product specification SAA7102; SAA7103 600, half anti-flicker filter YOFSO YOFSE YIWGTO 79 79 3129 85 85 3129 91 91 3129 96 96 3129 102 102 3129 ...
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... Product specification SAA7102; SAA7103 600, no anti-flicker filter YOFSO YOFSE YIWGTO 79 80 3490 85 86 3490 91 92 3490 96 97 3490 102 103 3490 ...
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... Product specification SAA7102; SAA7103 YOFSO YOFSE YIWGTO 52 52 3347 55 55 3347 59 59 3347 62 62 3347 65 65 3347 50 50 3357 53 53 3357 57 57 ...
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... Product specification SAA7102; SAA7103 YOFSO YOFSE YIWGTO 53 53 3996 56 56 3996 59 59 3996 62 62 3996 65 65 3996 51 51 4012 54 54 ...
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... Product specification SAA7102; SAA7103 YOFSO YOFSE YIWGTO 53 53 4092 56 56 4092 59 59 4092 62 62 4092 65 65 4092 51 51 4092 54 54 ...
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... Product specification SAA7102; SAA7103 YOFSO YOFSE YIWGTO 63 63 3131 67 67 3131 71 71 3131 74 74 3131 78 78 3131 61 61 3139 65 65 3139 69 69 ...
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... Product specification SAA7102; SAA7103 YOFSO YOFSE YIWGTO 63 63 3673 67 67 3673 71 71 3673 75 75 3673 79 79 3673 61 61 3686 65 65 ...
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... Product specification SAA7102; SAA7103 YOFSO YOFSE YIWGTO 64 64 4091 67 67 4091 71 71 4091 75 75 4091 79 79 4091 61 61 4091 65 65 ...
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... Product specification SAA7102; SAA7103 YOFSO YOFSE YIWGTO 79 79 2915 84 84 2915 89 89 2915 93 93 2915 98 98 2915 77 77 2922 81 81 2922 86 ...
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... Product specification SAA7102; SAA7103 YOFSO YOFSE YIWGTO 80 80 3349 84 84 3349 89 89 3349 94 94 3349 98 98 3349 77 77 3359 82 ...
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... Product specification SAA7102; SAA7103 YOFSO YOFSE YIWGTO 80 81 3783 84 85 3783 89 90 3783 94 95 3783 99 100 3783 77 78 3796 82 ...
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... RISING CLOCK EDGE PD5 PD4 R7 PD3 R6 PD2 R5 PD1 R4 PD0 G7/Y7 G6/Y6 G5/Y5 G4/Y4 35 Product specification SAA7102; SAA7103 RGB FALLING PIN CLOCK EDGE G2(G2) G1(G1) G0(G0) B4(B4) B3(B3) B2(B2) B1(B1) B0(B0) FALLING RISING FALLING CLOCK CLOCK CLOCK EDGE EDGE EDGE 7(0) Y7( 6(0) Y6(0) C 6(0) B ...
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... Y3(1) R PD5 C 2(0) Y2(1) R PD4 C 1(0) Y1(1) R PD3 C 0(0) Y0(1) R PD2 PD1 PD0 RISING CLOCK EDGE Product specification SAA7102; SAA7103 RGB/C -Y FALLING PIN CLOCK EDGE G4/Y4 G3/Y3 G2/ G0/ RISING CLOCK EDGE ...
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Acrobat reader. white to force landscape pages to be ... 7.19 Bit allocation map Table 31 Slave receiver (slave address 88H) SUB REGISTER FUNCTION ...
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Acrobat reader. white to force landscape pages to be ... SUB REGISTER FUNCTION ADDR. (HEX) Gain V 5C GAINV7 Gain U MSB, black level ...
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Acrobat reader. white to force landscape pages to be ... SUB REGISTER FUNCTION ADDR. (HEX) First active line 7A FAL7 Last active line 7B ...
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Acrobat reader. white to force landscape pages to be ... SUB REGISTER FUNCTION ADDR. (HEX) Border colour U A3 BCU7 Border colour V A4 ...
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... If more than 1 byte of DATA is transmitted, then auto-increment of the subaddress is performed. 2001 Sep 25 A DATA 0 RAM ADDRESS A DATA 0 A DATA DESCRIPTION 41 Product specification SAA7102; SAA7103 A -------- DATA n A -------- DATA n A DATA 0G A DATA 0B A DATA 0 Am -------- ...
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... DAC output voltage, should be set to 70 2001 Sep 25 DESCRIPTION DESCRIPTION 1.240 V at 37.5 nominal for full-scale conversion 1.240 V at 37.5 nominal for full-scale conversion 1.240 V at 37.5 nominal for full-scale conversion DESCRIPTION 42 Product specification SAA7102; SAA7103 GAIN (%) ...
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... DESCRIPTION default after reset a HIGH impulse resets synchronization of the encoder (first field, first line) PAL (1DH); default after reset if strapping pin 13 tied to HIGH NTSC (1DH); default after reset if strapping pin 13 tied to LOW 43 Product specification SAA7102; SAA7103 REMARKS REMARKS ...
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... GCD4 to GCD0 Gain colour difference of RGB (C Suggested nominal value = 0, depending on external application. 2001 Sep 25 DESCRIPTION DESCRIPTION DESCRIPTION , Y and C ) output, ranging from ( and C ) output, ranging from ( Product specification SAA7102; SAA7103 ) signal B ) signal ...
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... VPS14 fourteenth byte of video programming system data 2001 Sep 25 DESCRIPTION to RGB dematrix is active; default after reset R to RGB dematrix is bypassed R DESCRIPTION DESCRIPTION 45 Product specification SAA7102; SAA7103 REMARKS in line 16; LSB first; all other bytes are not relevant for VPS ...
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... BLCKL = 63 (3FH); note 1 output black level = 49 IRE white-to-sync = 143 IRE; recommended value: BLCKL = 51 (33H) note 2 BLCKL = 0; note 2 output black level = 27 IRE BLCKL = 63 (3FH); note 2 output black level = 47 IRE 2/6.29 + 28.9. 2/6.18 + 26.5. 46 Product specification SAA7102; SAA7103 RESULT REMARKS nominal to +2.16 nominal nominal to +2.04 nominal REMARKS nominal to +1.55 nominal nominal to +1.46 ...
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... DESCRIPTION DESCRIPTION DESCRIPTION black 100 IRE black 92.5 IRE including 7.5 IRE set-up of black 47 Product specification SAA7102; SAA7103 REMARKS recommended value: BLNNL = 46 (2EH) output blanking level = 25 IRE output blanking level = 45 IRE recommended value: BLNNL = 53 (35H) output blanking level = 26 IRE output blanking level = 46 IRE ...
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... FSC = 569408543 (21F07C1FH). = 1728 FSC = 705268427 (2A098ACBH). llc DESCRIPTION DESCRIPTION 48 Product specification SAA7102; SAA7103 REMARKS recommended value: BSTA = 63 (3FH) nominal recommended value: BSTA = 45 (2DH) nominal recommended value: BSTA = 67 (43H) nominal recommended value: BSTA = 47 (2FH); default after ...
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... Hz, 262 lines/field non-interlaced 313 lines/field at 50 Hz, 263 lines/field non-interlaced 313 lines/field at 50 Hz, 263 lines/field 2001 Sep 25 SAA7102; SAA7103 DESCRIPTION DESCRIPTION DESCRIPTION DESCRIPTION DESCRIPTION 49 Product specification ...
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... RGB output from 0 XTAL clocks to 31 XTAL clocks 2001 Sep 25 DESCRIPTION DESCRIPTION DESCRIPTION DESCRIPTION DESCRIPTION DESCRIPTION 50 Product specification SAA7102; SAA7103 REMARKS TTXHS = 42H; is default after reset if strapped to PAL TTXHS = 54H; is default after reset if strapped to NTSC REMARKS minimum value: TTXHD = 2; is default after reset ...
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... TTXOVS/TTXOVE and TTXEVS/TTXEVE 2001 Sep 25 DESCRIPTION DESCRIPTION DESCRIPTION DESCRIPTION DESCRIPTION 51 Product specification SAA7102; SAA7103 REMARKS TTXOVS = 05H; is default after reset if strapped to PAL TTXOVS = 06H; is default after reset if strapped to NTSC TTXOVE = 16H; is default after reset if strapped to PAL TTXOVE = 10H; is default after ...
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... YPIX defines the number of requested input lines from the feeding device; number of requested lines = YPIX + YOFSE 2001 Sep 25 DESCRIPTION MHz nominal, e.g. 640 XTAL XTAL DESCRIPTION DESCRIPTION DESCRIPTION DESCRIPTION DESCRIPTION YOFSO 52 Product specification SAA7102; SAA7103 480 to NTSC M: PCL = 20F63BH; ...
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... HSL 0 normal trigger event handling of the horizontal state machine, if the SAA7102; SAA7103 is slave to HSVGC input 1 trigger event for horizontal state machine is shifted 128 PIXCLKs in advance, adapted to a late HSVGC in slave mode Table 87 Subaddress 97H ...
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... Sep 25 DESCRIPTION DESCRIPTION number of PIXCLKs HLEN ---------------------------------------------------- - 1 = – line DESCRIPTION DESCRIPTION DESCRIPTION DESCRIPTION YIWGTO DESCRIPTION YIWGTE 54 Product specification SAA7102; SAA7103 number of output pixels ------------------------------------------------------------- - line XINC = ------------------------------------------------------------- - number of input pixels --------------------------------------------------------- - line number of active output lines YINC --------------------------------------------------------------------------- - = number of active input lines YINC = + 2048 ...
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... XCP horizontal cursor position Table 101 Subaddress FAH DATA BYTE XHS horizontal hot spot of cursor Table 102 Subaddresses FBH and FCH DATA BYTE YCP vertical cursor position 2001 Sep 25 SAA7102; SAA7103 DESCRIPTION DESCRIPTION DESCRIPTION DESCRIPTION DESCRIPTION DESCRIPTION DESCRIPTION DESCRIPTION DESCRIPTION 55 Product specification ...
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... In subaddresses 5BH, 5CH, 5DH, 5EH and 62H all IRE values are rounded up. 2001 Sep 25 DESCRIPTION DESCRIPTION -Y-C matrix is active R B -Y-C matrix is bypassed R B DESCRIPTION DESCRIPTION 56 Product specification SAA7102; SAA7103 -Y -Y -Y-C (ITU-R BT.656, 27 MHz clock -Y-C (special bit ordering ...
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... O_E 1 during even field 0 during odd field Table 109 Subaddress 1CH DATA BYTE CID chip ID of SAA7102 = 02H; chip ID of SAA7103 = 03H Table 110 Subaddress 80H LOGIC DATA BYTE LEVEL OVFL 0 no FIFO overflow 1 FIFO overflow has occurred; this bit is reset after this subaddress has been read ...
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... SCBW = 1. (2) SCBW = 0. handbook, halfpage (1) SCBW = 1. (2) SCBW = 0. 2001 Sep 25 ( Fig.4 Chrominance transfer characteristic (dB) 0 (1) ( 0.4 0.8 1.2 Fig.5 Chrominance transfer characteristic 2. 58 Product specification SAA7102; SAA7103 (MHz) MBE735 1.6 f (MHz) MBE737 14 ...
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... Fig.6 Luminance transfer characteristic 1 (excluding scaler). handbook, halfpage (1) CCRS1 = 0; CCRS0 = 0. Fig.7 Luminance transfer characteristic 2 (excluding scaler). 2001 Sep 25 (4) (2) (3) ( (dB) ( Product specification SAA7102; SAA7103 MBE736 6 f (MHz) MGD672 14 f (MHz) ...
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... Fig.8 Luminance transfer characteristic in RGB (excluding scaler). handbook, full pagewidth (dB Fig.9 Colour difference transfer characteristic in RGB (excluding scaler). 2001 Sep Product specification SAA7102; SAA7103 MGB708 (MHz) MGB706 (MHz) ...
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... Philips Semiconductors Digital video encoder 8 BOUNDARY SCAN TEST The SAA7102; SAA7103 has built-in logic and 5 dedicated pins to support boundary scan testing which allows board testing without special hardware (nails). The SAA7102; SAA7103 follows the “IEEE Std. 1149.1 - Standard Test Access Port and Boundary-Scan Architecture” set by the Joint Test Action Group (JTAG) chaired by Philips ...
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... Sep 0111000100000010 16-bit part number a. SAA7102 0111000100000011 16-bit part number b. SAA7103. Fig.10 32 bits of identification code. 62 Product specification SAA7102; SAA7103 LSB 1 0 TDO 00000010101 1 11-bit manufacturer identification MHB909 LSB 1 0 TDO 1 00000010101 11-bit manufacturer ...
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... Human body model: equivalent to discharging a 100 pF capacitor through a 1.5 k resistor. 10 THERMAL CHARACTERISTICS SYMBOL PARAMETER R thermal resistance from junction to ambient th(j-a) 2001 Sep 25 CONDITIONS outputs in 3-state; note 1 outputs active and V SSA(n) SSD(n) note 2 CONDITIONS in free air 63 Product specification SAA7102; SAA7103 MIN. MAX. UNIT 0.5 +4.6 V 0.5 +4 0.5 V DDA 0.5 +5 ...
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... V; note 2 DDD clocks data I/Os at high-impedance LOW or HIGH during acknowledge note 3 note 4 note 3 PIXCLK output CLKO2 note 3 note 3 note 5 64 Product specification SAA7102; SAA7103 MIN. TYP. MAX. 3.15 3.3 3.45 3.0 3.3 3.6 1 110 140 0.5 +0.8 2 0.3 DDD 0.4 2.4 0.5 0.3V DDD ...
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... If an internal oscillator is used, crystal deviation of nominal frequency is directly proportional to the deviation of subcarrier frequency and line/field frequency. 2001 Sep 25 CONDITIONS MIN 1.2 2 see Table 112 see Table 112 see Table 112 see Table 112 Product specification SAA7102; SAA7103 TYP. MAX. UNIT 1.5 1.8 fF 3.5 4 ...
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... HSVGC CBO PD 2001 Sep 25 T PIXCLK t HIGH HD;DAT t HD;DAT t SU;DAT t o(d) t o(h) Fig.11 Input/output timing specification. XOFS IDEL XPIX HLEN Fig.12 Horizontal input timing. 66 Product specification SAA7102; SAA7103 2.4 V 1 2.0 V 1 SU;DAT 2.0 V 0.8 V 2.4 V 0.4 V MHB904 MHB905 ...
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... Philips Semiconductors Digital video encoder handbook, full pagewidth HSVGC VSVGC CBO 2001 Sep 25 YOFS YPIX Fig.13 Vertical input timing. 67 Product specification SAA7102; SAA7103 MHB906 ...
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... Fig.14 Teletext timing. 68 Product specification SAA7102; SAA7103 is the internally used insertion window for i(TTXW) 2 C-bus register settings. t i(TTXW MHB891 ...
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... PD11 3 PD10 2 PD9 1 PD8 27 44 RED_CR_C PD7 43 28 PD6 GREEN_VBS_CVBS 42 PD5 30 41 PD4 BLUE_CB_CVBS 16 PD3 17 25 PD2 VSM 18 PD1 26 SAA7102H 19 HSM_CSYNC PD0 SAA7103H 34 22 XTALO HSVGC 14 VSVGC 35 XTALI 13 FSVGC 21 CBO R2 23 4.7 k TTX_SRES 24 TTXRQ_XCLKO2 S1 CP1 JP9 ...
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... Be careful of hidden layout capacitors around the crystal application. Use serial resistors in clock, sync and data lines, to avoid clock or data reflection effects and to soften data energy. 70 Product specification SAA7102; SAA7103 L3 2.7 H FOUT MHB912 RGB, BLACK-TO-WHITE see Table 48 876 e ...
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... Sep scale 15.2 13.7 15.2 13.7 1.0 13.0 14.8 13.0 14.8 13.0 REFERENCES JEDEC EIAJ 71 SAA7102; SAA7103 detail 1.65 0.15 0.35 0.3 0.1 1.10 EUROPEAN PROJECTION Product specification SOT472-1 ISSUE DATE 99-12-02 00-03-04 ...
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... 2.5 scale (1) ( 0.25 10.1 10.1 12.9 12.9 0.8 0.14 9.9 9.9 12.3 12.3 REFERENCES JEDEC EIAJ 72 SAA7102; SAA7103 detail 0.95 1.2 0.15 0.15 0.1 1.3 0.55 0.8 EUROPEAN PROJECTION Product specification SOT307 (1) ( 1.2 ...
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... If wave soldering is used the following conditions must be observed for optimal results: 2001 Sep 25 SAA7102; SAA7103 Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. For packages with leads on two sides and a pitch (e): – ...
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... This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A. 74 Product specification SAA7102; SAA7103 SOLDERING METHOD WAVE REFLOW suitable (2) suitable ...
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... C COMPONENTS 2 C components conveys a license under the Philips’ system provided the system conforms to the I 75 Product specification SAA7102; SAA7103 These products are not Philips Semiconductors 2 C patent to use the 2 C specification defined by ...
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... Philips Semiconductors – a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. © Koninklijke Philips Electronics N.V. 2001 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. ...