SAA7184 Philips Semiconductors, SAA7184 Datasheet - Page 22

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SAA7184

Manufacturer Part Number
SAA7184
Description
Digital Video Encoders DENC2-M6
Manufacturer
Philips Semiconductors
Datasheet

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Philips Semiconductors
Table 31 Subaddress 7A
Table 32 Subaddress 7B to 7D
Slave Transmitter
Table 33 Slave Transmitter (slave address 89H or 8DH)
Table 34 No subaddress
1996 Jul 03
Status byte
DATA BYTE
DATA BYTE
FUNCTION
REGISTER
Digital Video Encoders (DENC2-M6)
CCRDO
CCRDE
FLC1
VER
FSQ
FAL
LAL
0
0
1
1
DATA BYTE
first active line = FAL + 4 for M systems; = FAL + 1 for other systems, measured in lines
last active line = LAL + 3 for M systems; = LAL for other systems, measured in lines
Version identification of the device. It will be changed with all versions of the IC that have different
programming models. Current version is 100 binary.
1 = closed caption bytes of the odd field have been encoded.
0 = the bit is reset after information has been written to the subaddresses 67 and 68. It is set
immediately after the data have been encoded.
1 = closed caption bytes of the even field have been encoded.
0 = the bit is reset after information has been written to the subaddresses 69 and 6A. It is set
immediately after the data have been encoded.
State of the internal field sequence counter.
Bit 0 (FSQ0) gives the odd/even information; odd = LOW, even = HIGH.
SUBADDRESS
FAL = 0 coincides with the first field synchronization pulse
LAL = 0 coincides with the first field synchronization pulse
FLC0
0
1
0
1
field length control interlaced 312.5 lines/fields at 50 Hz, 262.5 lines/fields at 60 Hz
(reset default)
field length control non-interlaced 312 lines/fields at 50 Hz, 262 lines/fields at 60 Hz
field length control non-interlaced 313 lines/fields at 50 Hz, 262 lines/fields at 60 Hz
field length control non-interlaced 313 lines/fields at 50 Hz, 262 lines/fields at 60 Hz
VER2
D7
VER1
D6
22
DESCRIPTION
VER0
DESCRIPTION
D5
DESCRIPTION
CCRDO CCRDE
D4
DATA BYTE
D3
SAA7184; SAA7185B
FSQ2
D2
Preliminary specification
FSQ1
D1
FSQ0
D0

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