SAA7335GP Philips Semiconductors, SAA7335GP Datasheet - Page 12

• Manufacturer Part Number: SAA7335GP
• Description: DSP for CD and DVD-ROM systems
• Manufacturer: Philips Semiconductors

Philips Semiconductors
R
There are several internal status signals which can be made available on the INT line (see Table 2).
Table 2 Internal status signals; note 1
Note
1. The status signal to be output is selected by interrupt control register.
Subcode data/DVD header processing
Q-
The 96-bit Q-channel word is accumulated in an internal
buffer. Sixteen bits are used to perform a Cyclic
Redundancy Check (CRC). Subcode is available via the
V4 output and, in addition, the Q channel code can also be
read via the SUBREADDATA register.
DVD
The DVD header processor accumulates a selection of
bytes from the beginning of the DVD sector. Two header
modes are defined, one for reading the normal sector
headers and one for filtering the disk physical format
information (from the control data block in the lead-in area)
This is controlled by the READ_TOC bit in the DECMODE
register.
O
Data of the other subcode channels (Q-to-W) may be read
via the V4 pin, this is only valid in CD modes.
The data on the V4 pin is clocked on the WCLK edges with
a fixed delay and so may be clocked by external circuitry
running off the WCLK edges, i.e. at twice the WCLK
frequency.The subcode data is also available in the EBU
output (DOBM) in a similar format.
Crystal oscillator
The crystal oscillator is a conventional 2 pin design. This
oscillator is capable of operating with ceramic resonators
1997 Aug 11
Fl_S1
Fl_S2
Fl_S3
PLLlock
DVDrdy
MotOv
Tacho
EADING STATUS INFORMATION FROM THE
THER SUBCODE CHANNELS
DSP for CD and DVD-ROM systems
CHANNEL PROCESSING
SIGNAL
HEADER
change in semaphore register 1 detected
change in semaphore register 2 detected
change in semaphore register 3 detected
channel data PLL lock (not latched) indicates in-lock condition
DVD header or subcode block is available, reset when SUBREADEND register is read
motor overflow, (not latched) indicates when a motor overflow is occurring
motor speed is higher (or lower depending on TACHO3 bit 2) than motor set point (defined in
TACHO2) this signal is not latched
SAA7335
12
DESCRIPTION
and with both fundamental and third overtone crystals.
External components should be used to suppress the
fundamental output of the third overtone crystals as shown
in Figs 3 and 4. Typical oscillation frequencies required
are 8.462, 16.9344 or 22.57 MHz depending on the
internal clock settings used and whether or not the clock
multiplier is enabled.
Error corrector
The error corrector can operate in a number of modes; CD
single-pass, CD dual-pass and DVD mode. In the CD
single-pass mode the error corrector performs 2 error
corrections per frame (C1 and C2). In the CD dual-pass
mode up to 4 symbol corrections per frame are possible
(C1-C2 then C1-C2 again). For the DVD mode full depth
PI and PO error correction is performed allowing
5 corrections per PI row and full depth (2t + e)
corrector also contains a flag controller. Flags are
assigned to symbols when the error corrector cannot
ascertain if the symbols are definitely good. C1 generates
output flags which are read (after de-interleaving) by C2,
to help in the generation of C2 output flags. The C2 output
flags are used by the interpolator for concealment of
non-correctable errors. They are also output via the EBU
signal (DOBM) and the MISC output via the I
CD-ROM applications.
The flags output pin CFLG provides information on the
state of all error correction and concealment flags.
16 correction to be performed per PO column. The error
Preliminary specification
SAA7335
2
S-bus for