SAA7712 Philips Semiconductors, SAA7712 Datasheet
SAA7712
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SAA7712 Summary of contents
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... DATA SHEET SAA7712H Sound effects DSP Preliminary specification File under Integrated Circuits, IC02 INTEGRATED CIRCUITS 1999 Aug 05 ...
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... C-bus 2 Preliminary specification SAA7712H 2 I C-BUS FORMAT Addressing Slave address (pin A0) Write cycles Read cycles 2 I C-bus memory map summary 2 I C-bus memory map details LIMITING VALUES THERMAL CHARACTERISTICS DC CHARACTERISTICS ANALOG OUTPUTS CHARACTERISTICS OSCILLATOR CHARACTERISTICS ...
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... Surround (423) or Incredible Virtual Surround: Dolby Pro Logic Surround reproduced by 3 speakers (L, C and R) IS-3D Surround (423-IS): Same as 3D Surround (423) only with extra stereo width expander on left and right RIS-3D Surround (423-RIS): Same as IS-3D Surround (423-IS) with alternative algorithm 3 Preliminary specification SAA7712H ...
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... Depending on the sample frequency several combinations of the above mentioned features are possible. 2 APPLICATIONS The SAA7712H can be used in TV sets with: Dolby Pro Logic Surround, incredible surround, 3D Surround and advanced acoustics processing Multi-channel sound decoding (AC-3 and MPEG- co-processor. The SAA7712H can be used for post-processing ...
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... A-weighted kHz; A-weighted f = 16.384 MHz xtal f = 18.432 MHz xtal PACKAGE DESCRIPTION plastic quad flat package; 80 leads (lead length 1.95 mm); body 14 20 2.7 mm; high stand-off height 5 Preliminary specification SAA7712H MIN. TYP. MAX. UNIT 3 3 ...
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... Acrobat reader. white to force landscape pages to be ... SAA7712H S_IN1_WS from 29 2 audio I S_IN1_BCK 28 source S_IN1_DATA 2 I S-BUS INPUT 24 SWITCH 2 I S_IN2_WS from 26 2 audio I S_IN2_BCK 25 source 2 ...
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... I S_IO_OUT2 37 I S-bus output data channel 2 to DSP co-processor chip DSP_IN1 38 digital input 1 of the DSP core (F0 of the status register) 1999 Aug 05 DESCRIPTION 7 Preliminary specification SAA7712H PIN TYPE AP2D AP2D AP2D AP2D AP2D APVSS APVDD AP2D AP2D AP2D AP2D ...
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... VDACP1 76 not used VDACN1 77 not used 1999 Aug 05 DESCRIPTION 8 Preliminary specification SAA7712H PIN TYPE IBUFD B4CR B4CR VDD5 VSS5 IBUFD SCHMITCD BD4SCI4 BD4CR BT4CR VSS3S VSS3S VSS3S VDD3 VDD3 VSS3S VSS3S VSS3S ...
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... SCHMITCD Schmitt trigger input AP2D analog input/output OSC analog input/output VDD5 internal DD VDD3 internal DD VSS3S VSS5 external SS APVDD analog V APVSS analog V 1999 Aug 05 DESCRIPTION PIN DESCRIPTION internal substrate Preliminary specification SAA7712H PIN TYPE ...
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... OUT1_V 16 OUT1_I 17 OUT0_I 18 OUT0_V 19 EQOV 20 SYS_CLK 21 V DDD5V1 22 V SSD5V1 S_IN2_WS 24 1999 Aug 05 SAA7712H Fig.2 Pin configuration. 10 Preliminary specification SAA7712H V DD_OSC 64 63 OSC_OUT 62 OSC_IN V SS_OSC 61 60 TSCAN SHTCB 59 58 RTCB 57 DSP_RESET V SSD3V6 56 V SSD3V5 55 V SSD3V4 54 V DDD3V2 53 V DDD3V1 ...
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... A NALOG OUTPUT CIRCUIT Depending on the configuration of the equalizer sections, the SAA7712H has analog outputs which are supplied by the same power supply. Each of these outputs has a voltage and a current pin (see Fig.3). The signals are available on 2 outputs (OUT0 and OUT1 outputs (OUT0, OUT1, OUT2 and OUT3) ...
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... Aug 05 200 Fig.4 Overall frequency spectrum audio output. 10000 20000 11605 23211 12632 25263 Fig.5 Detailed frequency spectrum audio output. 12 Preliminary specification SAA7712H 300 400 38000 Hz f (kHz) 30000 38000 Hz 34816 44100 Hz 37895 48000 Hz f (Hz) ...
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... DAC can be fed from the 5 V power supply via a 1.8 V zener diode. A capacitor, connected to the 3.3 V power supply, provides power to the analog part when the 5 V power supply is switching off fast output level (dB) 13 Preliminary specification SAA7712H (POM) OWER N UTE P - OWER ...
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... See Fig.7 for the general waveform formats of the four possible formats. The serial digital inputs (and outputs) of the SAA7712H are capable of handling multiple formats: Philips I LSB-justified formats of 16, 18 and 20 bits word sizes. ...
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Acrobat reader. white to force landscape pages to be ... WS LEFT BCK DATA MSB B2 WS LEFT BCK DATA WS ...
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... S_IN1_WS and 2 S_IN1_BCK and 2 C-bus bits 8.2.3 For the co-processor I/O interface, the SAA7712H acts as a master. The SAA7712H supplies both the bit clock and word select. The I allow for selection of the desired I 256f . The minimum Table 13). s The bits needed for selecting a certain format are given in Table 4 ...
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... The sections of one channel can be chained one after the other. Depending on the I (see Table 11), the 20 filter sections are combined for the appropriate configuration, as illustrated in Fig.8. 17 Preliminary specification SAA7712H OUTPUT 2 standard I S-bus (default) LSB-justified format, 16 bits LSB-justified format, 18 bits LSB-justifi ...
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... The power supply connections of the oscillator are separate from the other supply lines. This is to minimize 32 kHz or the feedback from the ground bounce of the chip to the oscillator circuit. Pin V and pin V 18 Preliminary specification SAA7712H 4 5 OUT0 2 channel OUT1 2 channel OUT2 ...
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... Fig.9 Block diagram of the crystal oscillator circuit. 0.5V DD_OSC Gm AGC 100 k R bias on chip 62 63 OSC_IN OSC_OUT off chip slave input Fig.10 Block diagram of the oscillator in slave mode. 19 Preliminary specification SAA7712H clock out DD_OSC V SS_OSC MGS214 clock out DD_OSC V SS_OSC MGS215 ...
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... Preliminary specification SAA7712H 2 C-bus bits pll_fs_sel and DSP CLOCK FREQUENCY (MHz) (1) MSP3410D (3) 26.784 (3) 28.512 30.528 32.544 34.848 36.288 (3) 38.016 (3) 39.456 (3) 41.184 (3) 42 ...
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... C-bus format can be obtained from Philips Semiconductors, International Marketing and Sales Communications (IMSC). For the external control of the SAA7712H a fast I is implemented. This is a 400 kHz bus which is downward compatible with the standard 100 kHz bus. There are different types of control instructions: ...
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... Fig.12 START and STOP conditions. acknowledgement signal from receiver byte complete interrupt within receiver ACK Fig.13 Data transfer on the I 22 Preliminary specification SAA7712H P STOP condition MGS217 acknowledgement signal from receiver clock line held LOW while interrupts are serviced ACK 2 C-bus ...
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... During reset (see Section 8.8), the internal SDA line is kept HIGH and pin SDA is therefore high-impedance. The SDA line remains HIGH until a master pulls it down to initiate communication START condition Fig.14 Acknowledge on the I 23 Preliminary specification SAA7712H TATE OF THE BUS INTERFACE DURING AND P - AFTER OWER ...
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... PC_reset (bit 15, 0FFDH, see Table 11). This reset has the following function: The DSP algorithm is re-started The external control output pins are reset 2 (see Section 8.7). C-bus command. 2 C-bus command. 24 Preliminary specification ) is supplied to pin POM, DDA2 2 C-bus registers are reset to their default values SAA7712H ...
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... The master than generates a repeated START and again the SAA7712H address ‘0011110’ but this time followed by a logic 1 (read) of the read/write bit. From this moment on, the SAA7712H will send the memory content in groups of 2 (YRAM (XRAM) bytes to the I LSB acknowledged by the master ...
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Acrobat reader. white to force landscape pages to be ... ADDR ...
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... PLL clock division factor for DSP_clock (see Table 6) 1 reserved 1999 Aug 05 2 C-bus bits. The map is split into two different sections: hardware memory FUNCTION REGISTER NAME DESCRIPTION 27 Preliminary specification SAA7712H SIZE 4 16 bits 40 16 bits 384 12 bits 384 18 bits SUBADDRESS ...
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... I cloop_mode 3 cloop mode (see Table 5) 1999 Aug 05 DESCRIPTION DESCRIPTION DESCRIPTION 2 2 S_IN1 or I S_IN2 (see Table 3) 28 Preliminary specification SAA7712H DEFAULT POSITION division 10 doubling 11 4-channel 12 5-band 14 and 13 DSP running 15 DEFAULT POSITION ...
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... CIC specification/test method PARAMETER 29 Preliminary specification MIN. 0.5 +5 0.5 +6.5 550 & 750 +150 3000 +3000 300 +300 100 100 400 CONDITION VALUE in free air; note 1 45 SAA7712H MAX. UNIT series resistor. UNIT K/W ...
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... DSP18 maximum activity of DSP18 the DSP 4 DDD5V 3 DDD5V Preliminary specification SAA7712H MIN. TYP. MAX. 3 3.3 3.6 SS 4.5 5 5.5 3.0 3.3 3 3.5 3 135 400 0.7V DDD5V 0.3V DDD5V 1 1 ...
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... DDD3V T = 125 200 3.6 V; DDD5V DDD3V 200 3 DDD5V DDD3V T = 125 200 Preliminary specification SAA7712H MIN. TYP. MAX 200 6 200 300 40 400 UNIT ...
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... V = 0.72 V (RMS); o(ref) A-weighted V = 0.72 V (RMS); o(ref kHz; 60 dB; A-weighted kHz 0.72 V (RMS); o(ref) A-weighted A-weighted and 7 kHz, ratio decoupled 32 Preliminary specification SAA7712H MIN. TYP. MAX SSA2 37 37 0.62 0.7 0.82 1.5 1.65 1.8 3 ...
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... pF pF; see Fig.9 at start-up; 750 f = 18.432 MHz; xtal V = 3.3 V DD_OSC 33 Preliminary specification SAA7712H TYP. MAX. UNIT 19.456 MHz +30 ppm +30 ppm dB 2.6 3 1000 cycles ...
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... BCK T cy DATA IN DATA OUT Fig.17 Timing definitions of the serial digital inputs and outputs. 1999 Aug 05 PARAMETER 2 S-bus) 2 S-bus) 2 S-bus) 2 S-bus) t h(WS) t BCK( LSB 34 Preliminary specification SAA7712H MIN. MAX left t d(WS) t su(WS) t h(D) t su(D) MSB UNIT ...
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... Section 12 CONDITIONS 0 1.3 0.6 1.3 0.6 0 for standard mode I C-bus 100 system t > 250 ns SU;DAT f = 400 kHz 20 + 0.1C SCL f = 100 kHz 20 + 0.1C SCL 20 + 0.1C 0.6 35 Preliminary specification SAA7712H MIN. MAX. UNIT 400 kHz 0 (1) 300 ns b (1) 1000 ns b (1) 300 400 pF 50 ...
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Acrobat reader. white to force landscape pages to be ... SDA t BUF t LOW t r SCL t HD;STA t HD;DAT P S ...
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... DSP QUAD DAC 11 OUT2_I 1 OUT3_V 10 OUT3_I 1 POM 15 VREFDA DSP_IN1 39 DSP_IN2 2 I C-BUS INTERFACE 40 DSP_OUT1 41 DSP_OUT2 20 EQOV 4.7 k 4.7 k MGS222 5 V SAA7712H 100 OUT0 100 OUT1 100 OUT2 100 OUT3 4.7 F ...
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... 0.45 0.25 20.1 14.1 24.2 0.8 0.30 0.13 19.9 13.9 23.6 REFERENCES JEDEC EIAJ 38 Preliminary specification detail 18.2 1.0 1.95 0.2 0.2 0.1 17.6 0.6 EUROPEAN PROJECTION SAA7712H SOT318 (1) ( 1.0 1 0.6 0.8 0 ISSUE DATE 95-02-04 97-08-01 ...
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... Use a low voltage ( less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds 300 C. When using a dedicated tool, all other leads can be soldered in one operation within seconds between 270 and 320 C. 39 Preliminary specification SAA7712H ...
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... Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 1999 Aug 05 SOLDERING METHOD WAVE not suitable (2) suitable (3)(4) not recommended (5) not recommended 40 Preliminary specification SAA7712H (1) REFLOW suitable suitable suitable suitable suitable ...
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... Philips. This specification can be ordered using the code 9398 393 40011. 1999 Aug 05 C COMPONENTS 2 C components conveys a license under the Philips’ system provided the system conforms to the I 41 Preliminary specification SAA7712H 2 C patent to use the 2 C specification defined by ...
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... Philips Semiconductors Sound effects DSP 1999 Aug 05 NOTES 42 Preliminary specification SAA7712H ...
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... Philips Semiconductors Sound effects DSP 1999 Aug 05 NOTES 43 Preliminary specification SAA7712H ...
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... Tel. +46 8 5985 2000, Fax. +46 8 5985 2745 Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH, Tel. +41 1 488 2741 Fax. +41 1 488 3263 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2886, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel ...