PNX1300 Philips, PNX1300 Datasheet - Page 137

• Manufacturer Part Number: PNX1300
• Description: Media Processors
• Manufacturer: Philips

Audio In
8.1
In this document, the generic PNX1300 name refers
to the PNX1300 Series, or the PNX1300/01/02/11
products.
The PNX1300 Audio In (AI) unit connects to an off-chip
stereo A/D converter subsystem through a flexible bit-se-
rial connection. The AI unit provides all signals needed to
interface to high quality, low cost oversampling A/D con-
verters, including a generator for a precisely programma-
ble oversampling A/D system clock. Together, the AI unit
and external A/D provide the following capabilities:
• One or two channels of audio input.
• 8- or 16-bit samples per channel.
• Programmable sampling rate.
• Internal or external sampling clock source.
• Supports autonomous writes of sampled audio data
• Supports 8-bit mono and stereo as well as 16-bit
• Supports little- and big-endian memory formats.
8.2
Four PNX1300 pins are associated with the AI unit. The
AI_OSCLK output is an accurately programmable clock
output intended to serve as the master system clock for
the external A/D subsystem. The other three pins
(AI_SCK, AI_WS and AI_SD) constitute a flexible serial
input interface. Using the AI unit’s MMIO registers, these
pins can be configured to operate in a variety of serial in-
terface framing modes, including but not limited to:
• Standard stereo I
• LSB first with 1–16 bit data per channel.
• Complex serial frames of up to 512 bits/frame, with
The AI unit can be used with many serial A/D converter
devices, including the Philips SAA7366 (stereo A/D),
Crystal Semiconductor CS5331, CS5336 (stereo A/D’s),
CS4218 (codec), Analog Devices AD1847 (codec).
1.
to memory using double buffering (DMA).
mono and stereo PC standard memory data formats.
AI_WS, left & right data in a frame).
‘valid sample’ qualifier bit.
A definition of the Philips I
among others, can be found in the Philips IC01 da-
tabook.
AUDIO IN OVERVIEW
EXTERNAL INTERFACE
2
S (MSB first, 1-bit delay from
2
S serial interface protocol,
1
Table 8-1. AI unit external signals
PRELIMINARY SPECIFICATION
AI_OSCLK
AI_SCK
AI_SD
AI_WS
Signal
Type
I/O-5 • When the AI unit is programmed as
I/O-5 • When the AI unit is programmed as the
OUT Over-sampling clock. This output can be
IN-5
programmed to emit any frequency up to
40-MHz with a sub Hertz resolution. It is
intended for use as the 256f
over sampling clock by external A/D sub-
system.
• When the AI unit is programmed as the
AI_SCK is limited to 22 MHz. The sample
rate of valid samples embedded within
the serial stream is also limited by the
bandwidth.latency available in the sys-
tem
Serial data from external A/D subsystem.
Data on this pin is sampled on positive or
negative edges of AI_SCK as determined
by the CLOCK_EDGE bit in the
AI_SERIAL register.
• When the AI unit is programmed as the
AI_WS is the word-select or frame-syn-
chronization signal from/to the external A/
D subsystem.
serial-interface timing slave (power-up
default), AI_SCK is an input. AI_SCK
receives the serial bitclock from the
external A/D subsystem. This clock is
treated as fully asynchronous to
PNX1300 main clock.
serial-interface timing master, AI_SCK
is an output. AI_SCK drives the serial
clock for the external A/D subsystem.
The frequency is a programmable inte-
gral divide of the AI_OSCLK frequency.
serial-interface timing slave (power-up
default), AI_WS acts as an input.
AI_WS is sampled on the same edge
as selected for AI_SD.
serial-interface timing master, AI_WS
acts as an output. It is asserted on the
opposite edge of the AI_SD sampling
edge.
(Section
8-10).
by Gert Slavenburg
Description
Chapter 8
s
or 384f
s
8-1