MC68HC711PH8 Motorola, MC68HC711PH8 Datasheet - Page 135

• Manufacturer Part Number: MC68HC711PH8
• Description: High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit
• Manufacturer: Motorola

8
TIMING SYSTEM
The MC68HC11PH8 has three timing modules: a 16-bit timer system (incorporating pulse
accumulator, RTI and COP), a pulse width modulation (PWM) system and an 8-bit modulus timing
system comprising timers A, B and C.
8.1
16-bit timer
The M68HC11 timing system is composed of several clock divider chains. The main clock divider
chain includes a 16-bit free-running counter, which is driven by a programmable prescaler. The main
timer’s programmable prescaler provides one of the four clocking rates to drive the 16-bit counter.
8
Two prescaler control bits select the prescale rate. The prescaler output divides the system clock by
1, 4, 8, or 16. Taps from this main clocking chain drive circuitry may be used to generate the slower
clocks used by the pulse accumulator, the real-time interrupt (RTI), the computer operating properly
(COP) watchdog subsystems and the LCD module. Refer to Figure 8-1 and Figure 8-2.
All main timer system activities can be referenced to the free-running counter. The counter begins
incrementing from $0000 as the MCU comes out of reset, and continues to the maximum count,
$FFFF. At the maximum count, the counter rolls over to $0000, sets an overflow flag and continues
to increment. As long as the MCU is running in a normal operating mode, there is no way to reset,
change or interrupt the counting, unless, for reduced power consumption and if the PLL is in
operation, the 16-bit counter is disabled under control of the T16EN bit (see Section 8.1.1.1). The
capture/compare subsystem features three input capture channels, four output compare channels
and one channel that can be selected to perform either input capture or output compare. Each of
the input capture functions has its own 16-bit input capture register (time capture latch) and each
of the output compare functions has its own 16-bit compare register. All timer functions, including
the timer overflow and RTI, have their own interrupt controls and separate interrupt vectors. See
Table 8-1 for related frequencies and periods.
The pulse accumulator contains an 8-bit counter and edge select logic. The pulse accumulator
can operate in either event counting mode or gated time accumulation mode. During event
counting mode, the pulse accumulator’s 8-bit counter increments when a specified edge is
detected on an input pin. During gated time accumulation mode, an internal clock source
8
(ST4XCK/2
) increments the 8-bit counter while an input signal has a predetermined logic level.
TPG
MC68HC11PH8
TIMING SYSTEM
MOTOROLA
8-1