DP8392 National Semiconductor, DP8392 Datasheet - Page 5

• Manufacturer Part Number: DP8392
• Description: Coaxial Transceiver Interface
• Manufacturer: National Semiconductor

5 0 Pin Descriptions
5 1 P C BOARD LAYOUT
The DP8392A package is uniquely designed to ensure that
the device meets the 1 million hour Mean Time Between
Failure (MTBF) requirement of the IEEE 802 3 standard In
order to fully utilize this heat dissipation design the three
Pin No
IEEE names for CD
11
12
14
15
16
10
13
1
2
3
6
7
8
9
4
5
CD
CD
RX
RX
TX
TX
HBE
RR
RR
RXI
TXO
CDS
GND
VEE
g
Name
e
a
b
b
a
b
a
a
b
CI
g
RX
g
e
I O
O
O
O
I
I
I
I
I
DI
g
TX
g
e
Collision Output Balanced differential line driver outputs from the collision detect
circuitry The 10 MHz signal from the internal oscillator is transferred to these
outputs in the event of collision excessive transmission (jabber) or during CD
Heartbeat condition These outputs are open emitters pulldown resistors to VEE
are required When operating into a 78
be 500
higher resistor values (up to 1 5k) may be used to save power
Receive Output Balanced differential line driver outputs from the Receiver These
outputs also require 500
Transmit Input Balanced differential line receiver inputs to the Transmitter The
common mode voltage for these inputs is determined internally and must not be
externally established Signals meeting Transmitter squelch requirements are
waveshaped and output at TXO
Heartbeat Enable This input enables CD Heartbeat when grounded disables it
when connected to VEE
External Resistor A fixed 1k 1% resistor connected between these pins
establishes internal operating currents
Receive Input Connects directly to the coaxial cable Signals meeting Receiver
squelch requirements are equalized for inter-symbol distortion amplified and
outputted at RX
Transmit Output Connects either directly (Cheapernet) or via an isolation diode
(Ethernet) to the coaxial cable
Collision Detect Sense Ground sense connection for the collision detect circuit
This pin should be connected separately to the shield to avoid ground drops from
altering the receive mode collision threshold
Positive Supply Pin A 0 1 F ceramic decoupling capacitor must be connected
across GND and VEE as close to the device as possible
Negative Supply Pins In order to make full use of the 3 5W power dissipation
capability of this package these pins should be connected to a large metal frame
area on the PC board Doing this will reduce the operating die temperature of the
device thereby increasing the long term reliability
DO
g
In Cheapernet applications where the 78
g
5
V
should be included in the printed circuit board layout Refer
to National Semiconductor application note AN-442 (Ether-
net Cheapernet Physical Layer Made Easy) for complete
board layout instructions
EE
pulldown resistors
pins are to be connected to a copper plane which
Description
transmission line these resistors should
drop cable is not used