KM684000C Samsung, KM684000C Datasheet
KM684000C
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KM684000C Summary of contents
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... KM684000C Family Document Title 512Kx8 bit Low Power CMOS Static RAM Revision History Revision No. History 0.0 Initial draft 1.0 Finalize The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications and products. SAMSUNG Electronics will answer to your questions about device. If you have any questions, please contact the SAMSUNG branch offices. ...
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... Ground SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice. GENERAL DESCRIPTION The KM684000C families are fabricated by SAMSUNG s advanced CMOS process technology. The families support various operating temperature ranges and various package types for user flexibility of system design. The family also support low data retention voltage for battery back-up oper- ation with low data retention current ...
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... KM684000C Family PRODUCT LIST Commercial Temperature Products(0~70 C) Part Name Function KM684000CLP-5 32-DIP, 55ns, Low Power KM684000CLP-5L 32-DIP, 55ns, Low Low Power KM684000CLP-7 32-DIP, 70ns, Low Power KM684000CLP-7L 32-DIP, 70ns, Low Low Power KM684000CLG-5 32-SOP, 55ns, Low Power KM684000CLG-5L 32-SOP, 55ns, Low Low Power ...
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... KM684000C Family RECOMMENDED DC OPERATING CONDITIONS Item Supply voltage Ground Input high voltage Input low voltage Note: 1. Commercial Product : otherwise specified A Industrial Product : T =- otherwise specified A 2. Overshoot : V +3.0V in case of pulse width CC 3. Undershoot : -3.0V in case of pulse width 30ns 4. Overshoot and undershoot are sampled, not 100% tested. ...
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... End write to output low-Z DATA RETENTION CHARACTERISTICS Item Symbol Vcc for data retention V DR Data retention current I DR Data retention set-up time t SDR Recovery time t RDR Including scope and jig capacitance = KM684000CI Family:T A Symbol 55ns Min ...
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... KM684000C Family TIMMING DIAGRAMS TIMING WAVEFORM OF READ CYCLE(1) Address Data Out Previous Data Valid TIMING WAVEFORM OF READ CYCLE(2) Address CS OE High-Z Data out NOTES (READ CYCLE and are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output voltage ...
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... KM684000C Family TIMING WAVEFORM OF WRITE CYCLE(1) Address CS WE Data in Data Undefined Data out TIMING WAVEFORM OF WRITE CYCLE(2) Address CS WE Data in Data out NOTES (WRITE CYCLE write occurs during the overlap of a low CS and a low WE. A write begins at the latest transition among CS going Low and WE going low : A write end at the earliest transition among CS going high and WE going high the end of write ...
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... KM684000C Family PACKAGE DIMENSIONS 32 PIN DUAL INLINE PACKAGE (600mil) #32 13.60 0.20 0.535 0.008 #1 1. 0.075 32 PIN PLASTIC SMALL OUTLINE PACKAGE (525mil) #32 #1 20.87 0.822 20.47 0.806 +0.100 0.41 -0.050 0. +0.004 0.016 0.028 -0.002 42.31 MAX 1.666 41.91 0.20 1.650 0.008 0.46 0.10 0.018 0.004 1.52 2.54 0.10 0.060 0.100 0.004 #17 14.12 0.30 0.556 0.012 #16 2.74 0.20 MAX 0.108 0.008 3 ...
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... KM684000C Family PACKAGE DIMENSIONS 32 PIN THIN SMALL OUTLINE PACKAGE TYPE II (400F) #32 #1 0.825 0.95 0.40 0. 0.037 0.016 0.004 32 PIN THIN SMALL OUTLINE PACKAGE TYPE II (400R) #1 #32 21.35 0.841 20.95 0.825 0.95 0.40 0. 0.016 0.037 0.004 #17 11.76 0.463 #16 21.35 1.00 MAX 0.841 0.039 20.95 0.10 0.004 0.05 MIN 1.27 0.002 0.050 #16 11.76 0.20 0.463 0.008 #17 1.00 MAX 0.039 ...