CY7B923-400JI CYPRESS [Cypress Semiconductor], CY7B923-400JI Datasheet - Page 14

• Manufacturer Part Number: CY7B923-400JI
• Manufacturer: CYPRESS [Cypress Semiconductor]

When the RF pin is asserted HIGH, RDY leaves it normal mode
of operation and is asserted HIGH while the framer searches the data
stream for a K28.5 character. After the framer has synchronized to a
K28.5 character, the Receiver will assert the RDY pin LOW when the
K28.5 character is present at the parallel output. The RDY pin will
then resume its normal operation as dictated by the MODE and BIS-
TEN pins.
The normal operation of the RDY pin in encoded mode is to signal
when parallel data is present at the output pins by pulsing LOW with
a 60% LOW/40% HIGH duty cycle. RDY does not pulse LOW in a
field of K28.5 characters; however, RDY does pulse LOW for the last
K28.5 character in the field or for any single K28.5. In unencoded
mode, the normal operation of the RDY pin is to signal when any
K28.5 is at the parallel output pins.
The Transmitter and Receiver parallel interface timing and
functionality can be made to match the timing and functionality
of either an asynchronous FIFO or a clocked FIFO by appro-
priately connecting signals (See Figure 5 ). Proper operation of
the FIFO interface depends upon various FIFO-specific access and
response specifications.
The HOTLink Transmitter and Receiver serial interface pro-
vides a seamless interface to various types of media. A mini-
mal number of external components are needed to properly
terminate transmission lines and provide PECL loads. For
proper power supply decoupling, a single 0.01 F for each de-
vice is all that is required to bypass the VCC and GND pins. Figure
6 illustrates a HOTLink Transmitter and Receiver interface to fiber op-
tic and copper media. More information on interfacing HOTLink to
various media can be found in the HOTLink Design Considerations
application note.
CY7B923 HOTLink Transmitter Operating Mode
Description
In normal operation, the Transmitter can operate in either of
two modes. The Encoded mode allows a user to send and
Q0 7,
SC/D,
RVS
CKR
RDY
RF
DATA
FALLING EDGE OF CKR
RF LATCHED ON
DATA
Figure 4. CY7B933 Framing Operation in Encoded Mode
RDY IS HIGH WHILE WAITING FOR K28.5
DATA
DATA
DATA BOUNDARY CHANGES
CKR STRETCHES AS
14
receive eight (8) bit data and control information without first
converting it to transmission characters. The Bypass mode is
used for systems in which the encoding and decoding is per-
formed in an external protocol controller.
In either mode, data is loaded into the Input register of the
Transmitter on the rising edge of CKW. The input timing and
functional response of the Transmitter input can be made to
match the timing and functionality of either an asynchronous
FIFO or a clocked FIFO by an appropriate connection of input
signals (See Figure 5 ). Proper operation of the FIFO interface de-
pends upon various FIFO-specific access and response specifica-
tions.
Encoded Mode Operation
In Encoded mode the input data is interpreted as eight bits of
data (D
input bit (SVS). If the context of the data is to be normal message
data, the SC/D input should be LOW, and the data should be encod-
ed using the valid data character set described in the Valid Data Char-
acters section of this datasheet. If the context of the data is to be
control or protocol information, the SC/D input will be HIGH, and the
data will be encoded using the valid special character set described
in the Valid Special Character Codes and Sequences section. Spe-
cial characters include all protocol characters necessary to encode
packets for Fibre Channel, ESCON, proprietary systems, and diag-
nostic purposes.
The diagnostic characters and sequences available as Special
Characters include those for Fibre Channel link testing, as well
as codes to be used for testing system response to link errors
and timing. A Violation symbol can be explicitly sent as part
of a user data packet (i.e., send C0.7; D
SC/D = 1), or it can be sent in response to an external system using
the SVS input. This will allow system diagnostic logic to evaluate the
errors in an unambiguous manner, and will not require any modifica-
tion to the transmission interface to force transmission errors for test-
ing purposes.
DATA
0
D
7
RDY IS LOW
), a context control bit (SC/D), and a system diagnostic
FOR K28.5
K28.5
DATA
RDY RESUMES
OPERATION
NORMAL
7 0
DATA
B923–20
= 111 00000 and
CY7B923
CY7B933