AD707AR AD [Analog Devices], AD707AR Datasheet - Page 6

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AD707AR

Manufacturer Part Number
AD707AR
Description
Ultralow Drift Op Amp
Manufacturer
AD [Analog Devices]
Datasheet

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AD707
OFFSET NULLING
The input offset voltage of the AD707 is the lowest available in
a bipolar op amp, but if additional nulling is required, the
circuit shown in Figure 19 offers a null range of 200 V. For
wider null capability, omit R1 and substitute a 20 k potenti-
ometer for R2.
GAIN LINEARITY INTO A 1 k LOAD
The gain and gain linearity of the AD707 are the highest
available among monolithic bipolar amplifiers. Unlike other dc
precision amplifiers, the AD707 shows no degradation in gain or
gain linearity when driving loads in excess of 1 k over a 10 V
output swing. This means high gain accuracy is assured over the
output range. Figure 20 shows the gain of the AD707, OP07, and
the OP77 amplifiers when driving a 1 k load.
The AD707 will drive 10 mA of output current with no signifi-
cant effect on its gain or linearity.
Figure 19. External Offset Nulling and Power Supply
Bypassing
Figure 20. Gain Linearity of the AD707 vs.
Other DC Precision Op Amps
–15
@ +25 C
R
LOAD
= 1k
–10
0.1µF
2
3
–5
OUTPUT VOLTAGE – V
+V
7
S
AD707
10k
–V
R1
4
1
S
0
2k
R2
0.1µF
OFFSET
ADJUST
8
6
5
AD707
OP07
OP77
10
15
–6–
OPERATION WITH A GAIN OF 100
Demonstrating the outstanding dc precision of the AD707 in
practical applications, Table I shows an error budget calculation
for the gain of –100 configuration shown in Figure 21.
Error Source
V
I
Gain (2 k Load) (100 V/8
Noise
V
Total Unadjusted Error
Although the initial offset voltage of the AD707 is very low, it is
nonetheless the major contributor to system error. In cases
requiring additional accuracy, the circuit shown in Figure 19
can be used to null out the initial offset voltage. This method
will also cancel the effects of input offset current error. With the
offsets nulled, the AD707C will add less than 17 ppm of error.
This error budget assumes no error in the resistor ratio and no
errors from power supply variation (the 120 dB minimum PSRR
of the AD707C makes this a good assumption). The external
resistors can cause gain error from mismatch and drift over
temperature.
OS
OS
OS
With Offset Calibrated Out
Drift
@ +25 C
@ –55 C to +125 C
@ +25 C
@ –55 C to +125 C
Figure 21. Gain of –100 Configuration
V
IN
100
99
Maximum Error Contribution
Av = 100 (C Grade)
(Full Scale: V
15 V/100 mV
(100 )(1 nA)/100 mV
0.35 V/100 mV
(0.1 V/ C)/100 mV
Table I. Error Budget
2
3
10k
AD707
+V
–V
10
4
7
S
S
6
OUT
)100 mV
0.1µF
0.1µF
= 168 ppm > 12 Bits
= 268 ppm > 11 Bits
= 17 ppm > 15 Bits
= 117 ppm > 13 Bits
= 10 V, V
6
V
IN
= 150 ppm
=
= 13 ppm
=
=
= 168 ppm
+1 ppm/ C
OUT
= 100 mV)
1 ppm
4 ppm
1 ppm/ C
REV. B

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