AD7885 AD [Analog Devices], AD7885 Datasheet - Page 13
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AD7885
Manufacturer Part Number
AD7885
Description
LC2MOS 16-Bit, High Speed Sampling ADCs
Manufacturer
AD [Analog Devices]
Datasheet
1.AD7885.pdf
(16 pages)
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REV. C
AD7885 to 8088 Interface
The AD7885, with its byte (8 + 8) data format, is ideal for use
with the 8088 microprocessor. Figure 20 is the interface dia-
gram. Conversion is started by enabling CSA. At the end of
conversion, data is read into the processor. The read instruc-
tions are:
AD7884 to ADSP-2101 Interface
Figure 21 shows an intcrface between the AD7884 and the
ADSP-2101. Conversion is initiated using a timer which allows
very accurate control of the sampling instant. The AD7884
BUSY line provides an interrupt to the ADSP-2101 when con-
version is completed. The RD pulse width of the processor can
be programmed using the Data Memory Wait State Control
Register. The result can then be read from the ADC using the
following instruction:
where MR0 is the ADSP-2101 MR0 register, and
where
ADC is the AD7884 address.
DMA13 – DMA0
DMD15 – DMD0
ADSP-2101
8088
AD7 – AD0
Figure 21. AD7884 to ADSP-2101 Interface
A15 – A8
MOV AX, C001 Read 8 MSBs of data
MOV AX, C000 Read 8 LSBs of data
MN/MX
Figure 20. AD7885 to 8088 Interface
IO/M
ALE
IRQn
DMS
RD
RD
8282
STB
MR0 = DM (ADC)
+5 V
DECODE LOGIC
EN
DATA BUS
ADDRESS
DATA BUS
DECODE LOGIC
ADDRESS BUS
ADDRESS BUS
ADDRESS
CSB
CSA
TIMER
CONVST
CS
RD
DB7 – DB0
DB15 – DB0
CONVST
CS
BUSY
RD
AD7885
AD7884
HBEN
A0
–13–
Stand-Alone Operation
If CS and RD are tied permanently low on the AD7884, then,
when a conversion is completed, output data will be valid on the
rising edge of BUSY. This makes the device very suitable for
stand-alone operation. All that is required to run the device is an
external CONVST pulse which can be supplied by a sample
timer. Figure 22 shows the AD7884 set up in this mode with the
BUSY signal providing the clock for the 74HC574 3-state
latches.
Digital Feedthrough from an Active Bus
It is very important when using the AD7884/AD7885 in a
microprocessor-based system to isolate the ADC data bus from
the active processor bus while a conversion is being executed.
This will yield the best noise performance from the ADC.
Latches like the 74HC574 can be used to do this. If the device
is connected directly to an active bus then the converter noise
will typically increase by a factor of 30%.
Figure 22. Stand-Alone Operation
AD7884
DB15 – DB8
DB7 – DB0
HBEN
CONVST
A0
BUSY
CS
RD
TIMER
AD7884/AD7885
74HC574
74HC574
CLK
CLK