AP160 AMICC [AMIC Technology], AP160 Datasheet
AP160
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AP160 Summary of contents
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... EPROM, 256 bytes RAM, four 8-bit bi-directional and bit addressable I/O ports, three 16-bit timer/counter and eight interrupt sources. To reduce power consumption, idle mode and power down mode are provided to implementation. For data protection, program lock bits can be performed through programming LB1, LB2 and LB3. The AMIC AP160 is a useful and powerful microcontroller in many control system application. ...
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... QFP AP160 P0.4 (AD4) P0.5 (AD5) P0.6 (AD6) P0.7 (AD7) EA/VPP NC ALE/PROG PSEN P2.7 (A15) P2.6 (A14) P2.5 (A13) P0.4 (AD4) P0.5 (AD5) P0.6 (AD6) P0.7 (AD7) EA/VPP NC ALE/PROG PSEN P2.7 (A15) P2.6 (A14) P2.5 (A13) AMIC Technology, Inc. ...
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... PORT 2 DRIVERS PORT0 PORT2 RAM LATACH LATACH ACC POINTER TMP2 TMP1 ALU INTERRUPT, SERIAL PORT, AND TIMER BLOCKS PSW PORT1 PORT3 LATACH LATACH PORT 1 DRIVERS PORT 3 DRIVERS P1.0-P1.7 P3.0-P3.7 3 AP160 P2.0-P2.7 QUICK FLASH PROGRAM STACK ADDRESS REGISTER BUFFER PC INCREMENTER PROGRAM COUNER DPTR AMIC Technology, Inc. ...
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... TTL inputs.When 1s are written to Port 3 pins, they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current ( various special features of the AP160, as shown below: RXD (P3.0): Serial input port TXD (P3.1): Serial output port INT0 (P3 ...
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... Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode. PSEN O Program Store Enable is the read strobe to external program memory. When the AP160 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory. EA/Vpp I External Access Enable ...
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... SPECIAL FUNCTION REGISTERS A map of the on-chip memory area called the Special Function Register (SFR) space is shown in Table 1. Table 1. AP160 SFR Map and Reset Values 0F8H 0F0H B 00000000 0E8H 0E0H ACC 00000000 0D8H 0D0H PSW 00000000 0C8H T2CON T2MOD RCAP2L 00000000 XXXXXX00 ...
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... To ensure that a given level is sampled at least once before it changes, the level should be held for at least one full machine cycle. Version 0 RCLK TCLK EXEN2 Function CP/RL2 TR2 AP160 TR2 C/T2 CP/RL2 MODE 16-Bit Auto-Reload 16-Bit Capture Baud Rate Generator (Off) AMIC Technology, Inc. ...
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... CONTROL C/T2=1 TR2 CAPTURE RCAP2H CONTROL EXEN2 Figure 1. Timer in Capture Mode C/T2=0 TH2 CONTROL TR2 C/T2=1 RELOAD RCAP2H CONTROL EXEN2 Figure 2. Timer 2 Auto Reload Mode (DCEN=0) 8 AP160 TL2 TF2 OVERFLOW RCAP2L TIMER 2 INTERRUPT EXF2 TL2 OVERFLOW TIMER 2 INTERRUPT RCAP2L TF2 EXF2 AMIC Technology, Inc. ...
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... Function (DOWN COUNTING RELOAD VALUE) 0FFH 0FFH OVERFLOW TH2 TL2 CONTROL TR2 RCAP2H RCAP2L (UP COUNTING RELOAD VALUE) Figure 3. Timer 2 Auto Reload Mode (DCEN=1) 9 AP160 Reset Value = XXXX XX00B T2OE DCEN TOGGLE EXF2 TF2 TIMER 2 INTERRUPT COUNT DIRECTION 1=UP 0=DOWN T2EX PIN ...
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... Oscillator Frequency Rate 32 [ 65536 ( RCAP 2 TH2 TL2 CONTROL TR2 RCAP2H RCAP2L EXF2 CONTROL EXEN2 Figure 4. Timer 2 in Baud Rate Generator Mode 10 AP160 Rate H , RCAP TIMER 1 OVERFLOW 2 "1" "0" SMOD1 "1" "0" RCLK RX CLOCK 16 "1" "0" ...
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... RCAP2H and RCAP2L. OSC 2 P1.0 (T2) TRANSITION DETECTOR P1.1 (T2EX) Version 0.0 Oscillator Frequency Frequency 4 [ 65535 ( RCAP TR2 C/T2 BIT EXF2 EXEN2 Figure 5. Timer 2 in Clock-Out Mode 11 AP160 RCAP TL2 TH2 (8 BITS) (8 BITS) RCAP2L RCAP2H 2 T2OE (T2MOD.1) TIMER 2 INTERRUPT AMIC Technology, Inc. ...
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... INTERRUPTS The AP160 has a total of six interrupt vectors: two external interrupts (INT0 and INT1), three timer interrupts (Timers 0, 1, and 2), and the serial port interrupt. These interrupts are all shown in Figure 6. Each of these interrupt sources can be individually enabled or disabled by setting or clearing a bit in Special Function Register IE. IE also contains a global disable bit, EA, which disables all interrupts at once ...
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... REDUCED EMI All port pins of the AP160 have slew rate controlled outputs. This is to limit noise generated by quickly switching output signals. The slew rate is factory set to approximately 10 ns rise and fall times. AUXR Address = 8EH ...
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... EPROM PROGRAMMING MODE The setup for programming and verification on-chip OPT EPROM of AP160 is shown in Figure 7 and Figure 8, independently. The address of the EPROM location to be programmed is applied to ports 1 and 2. The code byte to be programmed into that location and read verified data are applied to port 0. The programming, verifying, Write Lock bits and read signature byte mode are selectable by the pins of RST, PSEN, ALE/PROG, P2 ...
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... JEDEC continuation code. Version 0.0 PROGRAM VALID Hi-Z DATA VPP LOGIC 1 LOGIC 0 t VPS t PW PSEN ALE/PROG EA/VPP L 12V 12V L 12V L 12V AP160 VERIFY DATA OUT DFP P2.6 P2.7 P3 AMIC Technology, Inc ...
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... PROGRAM MEMORY LOCK BITS The AP160 has three lock bits that can be left unprogrammed(U) or can be programmed (P) to obtain the additional features listed in the following table. Program Lock Bits LB1 LB2 LB3 program lock features MOVC instructions executed from external program memory are disabled from fetching code bytes from internal memory sampled and latched on reset, and further programming of the OPT EPROM is disabled ...
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... Test Freq. =1 MHZ Active Mode, 12 MHZ Idle Mode, 12MHZ VCC = 5.5V VCC = 3V I must be externally limited as follows may exceed the related specification. Pins are not guaranteed to sink currenr OL 17 AP160 Rating Unit -55 to +125 °C -65 to +150 ° +12.5 V -0.1 to +7 ...
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... CLCL 203 4 -130 t CLCL 33 -50 t CLCL 433 7 t -150 CLCL 33 -50 t CLCL 0 43 123 -40 t CLCL 18 AP160 Units Max 16 MHZ -100 t CLCL -105 t CLCL ns ns -25 t CLCL -105 t CLCL ...
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... P2.0-P2.7 OR A8-A15 FORM DPH Version 0.0 t PLPH t t AVLL LLIV t LLPL t PLIV t PLAZ t LLAX A0-A7 INSTR IN t AVIV A8-A15 t LLDV t RLRH t LLWL t LLAX t RLDV t t RLAZ RHDX DATA IN t AVDV 19 AP160 t PXAV t PXIZ t PXIX A0-A7 A8-A15 t WHLH t RHDZ A0-A7 FROM PCL INSTR IN A8-A15 FROM PCH AMIC Technology, Inc. ...
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... EXTERNAL CLOCK DRIVE Symbol Parameter Oscillator Frequency 1/ t CLCL Clock Period t CLCL High Time t CHCX Low Time t CLCX Rise Time t CLCH Fall time t CHCL Version 0.0 t CHCX t CLCH t CLCX t CLCL Min Max AMIC Technology, Inc. 20 AP160 t CHCL Units MHZ ...
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... VALID VALID VALID VALID 0.2 VCC + 0.9V TEST POINTS 0.2 VCC - 0.1V - 0.5V for a logic 1 and 0.45V for a logic 0. Timing measurements are CC max. for a logic 0.1V TIMING REFERENCE POINTS - 0.1V /V level occurs AP160 Variable Oscillator Units Min Max CLCL ns 10 -133 t CLCL ns 2 -117 t CLCL 0 ...
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... ORDERING INFORMATION Part Number AP160L AP160F NOTE : AMIC Technology, Inc. reserves the right to make changes without prior notice. Version 0.0 Package Type Temperature Range PLCC QFP 22 AP160 Operation - + +85 C AMIC Technology, Inc. ...
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... Dimensions in mm Min Nom Max Min - - 0.185 - 0.648 0.653 0.658 16.46 0.648 0.653 0.658 16.46 0.680 0.690 0.700 17.27 0.680 0.690 0.700 17.27 0.090 0.100 0.110 2. & G are for PC Board surface mount pad pitch AP160 unit: inches/mm 0.014/0.0008 C Nom Max - 4.70 16.59 16.71 16.59 16.71 17.53 17.78 17.53 17.78 2.54 2. AMIC Technology, Inc. ...
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... TYP 0.80 TYP 0.0021 0.0060 0.0099 0.1 0.15 0° - 7° 0° and E do not include mold protrusion AP160 unit: inches/mm 0.20 min 0 min Gauge Plane Seating Plane L 1.6 Max - 2.7 0.35 2.2 13.40 10.10 13.40 10.10 0.93 0.2 - 7° AMIC Technology, Inc. ...
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... Tel. +31-36-5359666 Fax. +31-36-5401888 US and Canada AMIC Technology Inc. 2518 Mission College Blvd., Suite 102 Santa Clara, CA 95054, U.S.A. Tel. +408-988-8818 Fax. +408-988-8817 Copyright © 2001 AMIC Technology, Inc. Specification subject to change without notice. All rights reserved. Version 0.0 AMIC Technology, Inc. 25 AP160 ...