PCS3P73U00AG-08-CR PULSECORE [PulseCore Semiconductor], PCS3P73U00AG-08-CR Datasheet - Page 5
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PCS3P73U00AG-08-CR
Manufacturer Part Number
PCS3P73U00AG-08-CR
Description
USB 2.0 Peak EMI reduction IC
Manufacturer
PULSECORE [PulseCore Semiconductor]
Datasheet
1.PCS3P73U00AG-08-CR.pdf
(13 pages)
May 2008
rev 0.3
Note: For AC Coupled Interface refer to Application Brief:CT100801
Typical Crystal Specifications
R
The value of the compliance resistor , R
USB2.0 signaling rate (frequency) deviation to 1000ppm
peak-to-peak (+/-500ppm). It causes a -4dB peak power
EMI reduction at the 480MHz fundamental USB2.0
frequency. Higher harmonics are reduced more.
If the R
compliance limit, it will set the USB2.0 signaling rate
(frequency) deviation to above 1000ppm peak-to-peak.
Fundamental AT cut parallel resonant crystal
Nominal frequency
Frequency tolerance
Operating temperature range
Storage temperature
Load capacitance
Shunt capacitance
ESR
Compliance
Compliance
is set to a lower value than its
Notice: The information in this document is subject to change without notice.
Compliance
Fig1:
USB 2.0 Peak EMI reduction IC
Typical Crystal Interface Circuit
sets the
C1 = 27 pF
Crystal
R
48MHz
± 50 ppm or better at 25°C
-25°C to +85°C
-40°C to +85°C
18pF
7pF maximum
25 Ω
For settings above 1000ppm the USB2.0 compliance
pass/fail
functionality is maintained upto 3000ppm peak-to-peak
signaling rate (frequency) deviation. The EMI tradeoff in
the
functional (and compliant intermittent) the 2000ppm
frequency deviation can provide -7dB of EMI attenuation
at the 480MHz fundamental.
R1 = 510Ω
C2 = 27 pF
system
becomes
is
attenuation/compliance.
gradually
PCS3P73U00A
intermittent.
5 of 13
While
USB2.0
fully