DP8570 NSC [National Semiconductor], DP8570 Datasheet - Page 21

• Manufacturer Part Number: DP8570
• Description: Timer Clock Peripheral (TCP)
• Manufacturer: NSC [National Semiconductor]

Application Hints
Suggested Initialization Procedure for DP8570A in bat-
tery backed applications that use the V
1 Enter the test mode by writing a 1 to bit D7 in the Period-
2 Write zero to the RAM TEST mode Register located in
3 Leave the test mode by writing a 0 to bit D7 in the Period-
4 After power on (V
5 Enter a software loop that does the following
Typical Application
ic Flag Register
page 0 address HEX 1F
ic Flag Register Steps 1 2 3 guarantee that if the test
mode had been entered during power on (due to random
pulses from the system) all test mode conditions are
cleared Most important is that the OSC Fail Disable bit is
cleared Refer to AN-589 for more information on test
mode operation
rect crystal frequency bits (D7 D6 in the Real Time Mode
Register) as shown in Table I
Set a 3 second (approx ) software counter The crystal
oscillator may take 1 second to start
5 1 Write a 1 to bit D3 in the Real Time Mode Register
32 768 kHz
4 194304 MHz
4 9152 MHz
32 0 kHz
(try to start the clock) Make sure the crystal select
bits remain the same as in step 1 Under normal
operation this bit can be set only if the oscillator is
Frequency
CC
and V
TABLE I
BB
powered) select the cor-
D7
0
0
1
1
These components may be necessary to meet UL requirements
BB
for lithium batteries Consult battery manufacturer
pin
D6
0
1
0
1
21
6 Test bit D6 in the Periodic Flag Register
7 Write a 0 to bit D6 in the Periodic Flag Register This
8 Write a 1 to bit D7 of Interrupt Control Register 1 This
9 Write a 1 to bit D4 of the Real Time Mode Register This
10 Initialize the rest of the chip as needed
IF a 1 go to 5 1 If this bit remains a 1 after 3 seconds
then abort and check hardware The crystal may be de-
fective or not installed There may be a short at OSC IN
or OSC OUT to V
is less than 10 M
IF a 0 then the oscillator is running go to step 7
action puts the clock chip in the battery backed mode
This mode can be entered only if the osc fail flag (bit D6
of the Periodic Flag Register) is a 0 Reminder Bit D6 is
a dual function bit When read D6 returns oscillator
status When written D6 causes either the Battery
Backed Mode or the Single Supply Mode of operation
The only method to ensure the chip is in the battery
backed mode is to measure the waveform at the OSC
OUT pin If the battery backed mode was selected suc-
cessfully then the peak to peak waveform at OSC OUT
is referenced to the battery voltage If not in battery
backed mode the waveform is referenced to V
measurement should be made with a high impedance
low capacitance probe (10 M
probe or better) Typical peak to peak swings are within
0 6V of V
action enables the PFAIL pin and associated circuitry
action ensures that bit D7 of Interrupt Control Register 1
remains a 1 when V
running During the software loop RAM real time
counters output configuration interrupt control and
timer functions may be initialized
CC
and ground respectively
CC
BB l
or GND or to some impedance that
V
CC
(Standby Mode)
10 pF oscilloscope
TL F 8638 – 22
CC
The