MAX5062 MAXIM [Maxim Integrated Products], MAX5062 Datasheet - Page 11
![no-image](/images/no-image-200.jpg)
MAX5062
Manufacturer Part Number
MAX5062
Description
125V/2A, High-Speed, Half-Bridge MOSFET Drivers
Manufacturer
MAXIM [Maxim Integrated Products]
Datasheet
1.MAX5062.pdf
(19 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MAX5062AASA
Manufacturer:
MAXIM/美信
Quantity:
20 000
Part Number:
MAX5062AASA+T
Manufacturer:
MAXIM/美信
Quantity:
20 000
The voltage at BBM is regulated to 1.3V. The BBM circuit
adjusts t
Bypass BBM to AGND with a 1nF or smaller ceramic
capacitor (C
caused during switching. The charging time of C
does not affect t
is stabilized before the UVLO clears the device turn-on.
Topologies like the two-switch forward converter, where
both high- and low-side switches are turned on and off
simultaneously, can have the BBM function disabled by
leaving BBM unconnected. When disabled, t
cally 1ns.
The MAX5062_/MAX5064A are CMOS (V
input drivers while the MAX5063_/MAX5064B have TTL-
compatible logic inputs. The logic-input signals are
independent of V
ered by a 10V supply while the logic inputs are provid-
ed from a 12V CMOS logic. Also, the logic inputs are
protected against voltage spikes up to 15V, regardless
of the V
have 400mV and 1.6V hysteresis, respectively, to avoid
double pulsing during transition. The logic inputs are
high-impedance pins and should not be left floating.
The low 2.5pF input capacitance reduces loading and
increases switching speed. The noninverting inputs are
pulled down to GND and the inverting inputs are pulled
up to V
output from the controller must assume a proper state
while powering up the device. With the logic inputs
floating, the DH and DL outputs pull low as V
up above the UVLO threshold.
The MAX5064_ has two logic inputs per driver, which
provide greater flexibility in controlling the MOSFET.
Use IN_H+/IN_L+ for noninverting logic and IN_H-/
IN_L- for inverting logic operation. Connect
IN_H+/IN_L+ to V
used. Alternatively, the unused input can be used as an
ON/OFF function. Use IN_+ for active-low and IN_- for
active-high shutdown logic.
Table 1. MAX5064_ Truth Table
IN_H+/IN_L+
Driver Logic Inputs (IN_H, IN_L, IN_H+,
High
High
Low
Low
DD
BBM
DD
internally using a 1MΩ resistor. The PWM
voltage. The TTL and CMOS logic inputs
BBM
depending on the current drawn by R
BBM
) to avoid any effect of ground bounce
DD
______________________________________________________________________________________
DD
. For example, the IC can be pow-
at turn-on because the BBM voltage
IN_H-/IN_L-
and IN_H-/IN_L- to GND if not
High
High
Low
Low
IN_H-, IN_L+, IN_L-)
DD
DH/DL
BBM
High
Low
Low
Low
/ 2) logic-
DD
Half-Bridge MOSFET Drivers
is typi-
BBM
rises
BBM
.
Pay extra attention to bypassing and grounding the
MAX5062/MAX5063/MAX5064. Peak supply and output
currents may exceed 4A when both drivers are driving
large external capacitive loads in-phase. Supply drops
and ground shifts create forms of negative feedback for
inverters and may degrade the delay and transition
times. Ground shifts due to insufficient device ground-
ing may also disturb other circuits sharing the same AC
ground return path. Any series inductance in the V
DH, DL, and/or GND paths can cause oscillations due
to the very high di/dt when switching the MAX5062/
MAX5063/MAX5064 with any capacitive load. Place
one or more 0.1µF ceramic capacitors in parallel as
close to the device as possible to bypass V
(MAX5062/MAX5063) or PGND (MAX5064). Use a
ground plane to minimize ground return resistance and
series inductance. Place the external MOSFET as close
as possible to the MAX5062/MAX5063/MAX5064 to fur-
ther minimize board inductance and AC path resis-
tance. For the MAX5064_ the low-power logic ground
(AGND) is separated from the high-power driver return
(PGND). Apply the logic-input signal between IN_ to
AGND and connect the load (MOSFET gate) between
DL and PGND.
Power dissipation in the MAX5062/MAX5063/MAX5064
is primarily due to power loss in the internal boost
diode and the nMOS and pMOS FETS.
For capacitive loads, the total power dissipation for the
device is:
where C
DL. V
frequency of the converter. P
sipated in the internal bootstrap diode. The internal
power dissipation reduces by P
bootstrap Schottky diode is used. The power dissipa-
tion in the internal boost diode (when driving a capaci-
tive load) will be the charge through the diode per
switching period multiplied by the maximum diode for-
ward voltage drop (V
125V/2A, High-Speed,
P
D
DD
=
L
⎛
⎝
P
is the supply voltage and f
C
DIODE
is the combined capacitive load at DH and
L
×
Supply Bypassing and Grounding
V
Applications Information
DD
=
2
C
×
f
DH
= 1V).
f
SW
×
(
⎞
⎠ +
V
DD
D
(
I
DDO
−
includes the power dis-
Power Dissipation
1
DIODE
)
+
×
SW
I
f
BSTO
SW
is the switching
, if an external
×
)
V
DD
×
f
V
to GND
DD
DD
11
,