MAXQ61HX-0000+ MAXIM [Maxim Integrated Products], MAXQ61HX-0000+ Datasheet - Page 7

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MAXQ61HX-0000+

Manufacturer Part Number
MAXQ61HX-0000+
Description
16-BIt Microcontroller with Infrared Module
Manufacturer
MAXIM [Maxim Integrated Products]
Datasheet
13, 22, 30
15, 29
PIN
1–8
14
28
18
19
31
32
16-Bit Microcontroller with Infrared Module
TBA0, TBA1;
TBB0, TBB1;
INT8–INT15
P0.0–P0.7;
REGOUT
HFXOUT
_______________________________________________________________________________________
IRTXM;
RESET
NAME
HFXIN
(GND)
IRRX
GND
IRTX
V
EP
DD
Supply Voltage
Regulator Capacitor. This pin must be connected to ground through a 1.0μF external ceramic-
chip capacitor in series with a 2 to 10 resistor. The capacitor must be placed as close to this
pin as
this pin.
Ground
Exposed Pad/Ground. The GND contact is through the exposed paddle located on the
underside of the package. It must be directly connected to the ground plane.
Digital, Active-Low, Reset Input/Output. The CPU is held in reset when this pin is low and
begins executing from the reset vector when released. The pin includes pullup current source
and should be driven by an open-drain, external source capable of sinking in excess of 4mA.
This pin is driven low as an output when an internal reset condition occurs.
High-Frequency Crystal Input. Connect an external crystal or resonator between HFXIN and
HFXOUT as the high-frequency system clock. Alternatively, HFXIN is the input for an external,
high-frequency clock source when HFXOUT is unconnected.
IR Transmit Output. IR transmit pin capable of sinking 25mA. This pin defaults to a high-
impedance input with the weak pullup disabled during all forms of reset. Software must
configure this pin after release from reset to remove the high-impedance input condition.
IR Receive Input. IR receive pin. This pin defaults to a high-impedance input with the weak
pullup disabled during all forms of reset. Software must configure this pin after release from
reset to remove the high-impedance input condition.
General-Purpose, Digital, I/O, Type-D Port. These port pins function as bidirectional I/O pins.
All port pins default to high-impedance mode after a reset. Software must configure these pins
after release from reset to remove the high-impedance input condition. All alternate functions
must be enabled from software. Port 0 can optionally be defined with INT8–INT15.
GENERAL-PURPOSE I/O AND SPECIAL FUNCTION PINS
possible.
PIN
1
2
3
4
5
6
7
8
No other external devices other than the capacitor should be connected to
IR FUNCTION PINS
POWER PINS
RESET PINS
CLOCK PINS
FUNCTION
PORT
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
SPECIAL FUNCTION
Pin Description
TBA0/TBA1/INT13
TBB0/INT14
TBB1/INT15
IRTXM/INT8
INT10
INT11
INT12
INT9
7

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