74LVTH373 FAIRCHILD [Fairchild Semiconductor], 74LVTH373 Datasheet - Page 2

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74LVTH373

Manufacturer Part Number
74LVTH373
Description
Low Voltage Octal Transparent Latch with 3-STATE Outputs
Manufacturer
FAIRCHILD [Fairchild Semiconductor]
Datasheet
©1999 Fairchild Semiconductor Corporation
74LVT373, 74LVTH373 Rev. 1.5.0
Connection Diagram
Pin Description
Functional Description
The LVT373 and LVTH373 contain eight D-type latches
with 3-STATE standard outputs. When the Latch Enable
(LE) input is HIGH, data on the D
latches. In this condition the latches are transparent, i.e.,
a latch output will change state each time its D input
changes. When LE is LOW, the latches store the infor-
mation that was present on the D inputs a setup time
preceding the HIGH-to-LOW transition of LE. The
3-STATE standard outputs are controlled by the Output
Enable (OE) input. When OE is LOW, the standard out-
puts are in the 2-state mode. When OE is HIGH, the
standard outputs are in the high impedance mode but
this does not interfere with entering new data into the
latches.
D
LE
OE
O
Pin Names
0
0
–D
–O
7
7
Data Inputs
Latch Enable Input
Output Enable Input
3-STATE Latch Outputs
Description
n
inputs enters the
2
Logic Symbols
Truth Table
H
L
Z
X
O
of Latch Enable
0
LOW Voltage Level
High Impedance
Immaterial
HIGH Voltage Level
LE
H
H
X
L
Previous O
Inputs
OE
0
H
L
L
L
before HIGH-to-LOW transition
IEEE/IEC
D
X
H
X
L
n
Outputs
www.fairchildsemi.com
O
O
H
Z
L
n
0

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