MAX534ACPE MAXIM [Maxim Integrated Products], MAX534ACPE Datasheet

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MAX534ACPE

Manufacturer Part Number
MAX534ACPE
Description
+5V, Low-Power, 8-Bit Quad DAC with Rail-to-Rail Output Buffers
Manufacturer
MAXIM [Maxim Integrated Products]
Datasheet
The MAX534 serial-input, voltage-output, 8-bit quad dig-
ital-to-analog converter (DAC) operates from a single
+4.5V to +5.5V supply. Internal precision buffers swing
rail to rail, and the reference input range includes both
ground and the positive rail. The MAX534 features a
2.5µA shutdown mode.
The serial interface is double buffered: a 12-bit input
shift register is followed by four 8-bit buffer registers and
four 8-bit DAC registers. The 12-bit serial word consists
of eight data bits and four control bits (for DAC selection
and special programming commands). Both the input
and DAC registers can be updated independently or
simultaneously with a single software command. Two
additional asynchronous control pins, LDAC and CLR,
provide simultaneous updating or clearing of the input
and DAC registers.
The interface is compatible with SPI™, QSPI™ (CPOL =
CPHA = 0 or CPOL = CPHA = 1), and Microwire™. A
buffered data output allows daisy chaining of serial
devices.
In addition to 16-pin DIP and CERDIP packages, the
MAX534 is available in a 16-pin QSOP that occupies the
same area as an 8-pin SO.
For operation guaranteed to 2.7V, see the MAX533
data sheet.
________________________Applications
SPI and QSPI are trademarks of Motorola, Inc. Microwire is a trademark of National Semiconductor Corp.
19-1105; Rev 0; 8/96
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800
_______________General Description
__________________Pin Configuration
TOP VIEW
Digital Gain and Offset Adjustments
Programmable Attenuators
Programmable Current Sources
Portable Instruments
DOUT
OUTB
OUTA
LDAC
UPO
PDE
CLR
REF
________________________________________________________________ Maxim Integrated Products
1
2
3
4
5
6
7
8
DIP/QSOP
MAX534
16
15
14
13
12
11
10
9
+5V, Low-Power, 8-Bit Quad DAC
OUTC
OUTD
AGND
V
DGND
DIN
SCLK
CS
DD
with Rail-to-Rail Output Buffers
____________________________Features
*Dice are tested at T
**Contact factory for availability and processing to MIL-STD-883.
Functional Diagram appears at end of data sheet.
______________Ordering Information
MAX534ACPE
MAX534BCPE
MAX534ACEE
MAX534BCEE
MAX534BC/D
MAX534AEPE
MAX534BEPE
MAX534AEEE
MAX534BEEE
MAX534AMJE
MAX534BMJE
+4.5V to +5.5V Single-Supply Operation
Ultra-Low Supply Current:
Ultra-Small 16-Pin QSOP Package
Ground to V
Output Buffer Amplifiers Swing Rail to Rail
10MHz Serial Interface Compatible with SPI, QSPI
(CPOL = CPHA = 0 or CPOL = CPHA = 1), and
Microwire
Double-Buffered Registers for Synchronous
Updating
Serial Data Output for Daisy Chaining
Power-On Reset Clears Serial Interface and Sets
All Registers to Zero
Software Shutdown
Software-Programmable Logic Output (µC I/O
Extender)
Asynchronous Hardware Clear Resets All Internal
Registers to Zero
0.8mA while Operating
2.5µA in Shutdown Mode
PART
DD
TEMP. RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
A
-55°C to +125°C 16 CERDIP**
-55°C to +125°C 16 CERDIP**
Reference Input Range
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
= +25°C.
16 Plastic DIP
16 Plastic DIP
16 QSOP
16 QSOP
Dice*
16 Plastic DIP
16 Plastic DIP
16 QSOP
16 QSOP
PIN-PACKAGE
(LSB)
INL
±1
±2
±1
±2
±2
±1
±2
±1
±2
±1
±2
1

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MAX534ACPE Summary of contents

Page 1

... Serial Data Output for Daisy Chaining Power-On Reset Clears Serial Interface and Sets All Registers to Zero Software Shutdown Software-Programmable Logic Output (µC I/O Extender) Asynchronous Hardware Clear Resets All Internal Registers to Zero ______________Ordering Information PART MAX534ACPE MAX534BCPE MAX534ACEE MAX534BCEE MAX534BC/D MAX534AEPE OUTC MAX534BEPE OUTD MAX534AEEE ...

Page 2

Low-Power, 8-Bit Quad DAC with Rail-to-Rail Output Buffers ABSOLUTE MAXIMUM RATINGS V to DGND ..............................................................-0.3V, + AGND...............................................................-0.3V, +6V DD Digital Input Voltage to DGND ....................................-0.3V, +6V Digital Output Voltage to DGND....................-0.3V, (V AGND to DGND ..................................................................±0.3V ...

Page 3

ELECTRICAL CHARACTERISTICS (continued +4.5V to +5.5V 4.096V, AGND = DGND = 0V REF Typical values are +5V and T = +25°C PARAMETER SYMBOL DIGITAL INPUTS Input High Voltage V ...

Page 4

Low-Power, 8-Bit Quad DAC with Rail-to-Rail Output Buffers TIMING CHARACTERISTICS (continued +4.5V to +5.5V 4.096V, AGND = DGND = 0V REF Typical values are +5V and T = +25°C.) DD ...

Page 5

Low-Power, 8-Bit Quad DAC __________________________________________Typical Operating Characteristics (V = +5V +25°C, unless otherwise noted DAC ZERO-CODE OUTPUT VOLTAGE vs. OUTPUT SINK CURRENT 1. REF 1.25 DAC CODE = 00 HEX LOAD TO ...

Page 6

Low-Power, 8-Bit Quad DAC with Rail-to-Rail Output Buffers ______________________________________________________________Pin Description PIN NAME 1 OUTB DAC B Voltage Output 2 OUTA DAC A Voltage Output 3 REF Reference-Voltage Input 4 UPO Software-Programmable Logic Output 5 PDE Power-Down Enable. Must be ...

Page 7

Low-Power, 8-Bit Quad DAC CS SCLK DIN MSB DACA DOUT MODE DATA FROM PREVIOUS ...

Page 8

Low-Power, 8-Bit Quad DAC with Rail-to-Rail Output Buffers _______________Detailed Description Serial Interface At power-on, the serial interface and all digital-to- analog converters (DACs) are cleared and set to code zero. The serial data output (DOUT) is set to transition ...

Page 9

Low-Power, 8-Bit Quad DAC Table 1. Serial-Interface Programming Commands 12-BIT SERIAL WORD ...

Page 10

Low-Power, 8-Bit Quad DAC with Rail-to-Rail Output Buffers For this command, the data bits are “Don't Cares.” example, three MAX534s are daisy chained (A, B, and C), and devices A and C need to be updated. The ...

Page 11

Interfacing to the Microprocessor The MAX534 is Microwire™ and SPI™/QSPI™ compati- ble (Figures 4 and 5). For SPI and QSPI, clear the CPOL and CPHA configuration bits (CPOL = CPHA = 0). The SPI/QSPI CPOL = CPHA = 1 configuration ...

Page 12

Low-Power, 8-Bit Quad DAC with Rail-to-Rail Output Buffers DIN SCLK LDAC CS1 CS2 CS3 CS MAX534 LDAC SCLK DIN Figure 7. Multiple MAX534s sharing one DIN line. Simultaneously update by strobing LDAC, or specifically update by enabling an individual ...

Page 13

Information DAC Linearity and Voltage Offset The output buffer can have a negative input offset volt- age that would normally drive the output negative, but since there is no negative supply the output stays at 0V (Figure 9). When ...

Page 14

Low-Power, 8-Bit Quad DAC with Rail-to-Rail Output Buffers Table 2. Unipolar Code Table DAC CONTENTS MSB LSB ...

Page 15

Low-Power, 8-Bit Quad DAC ________________________________________________________Package Information ______________________________________________________________________________________ with Rail-to-Rail Output Buffers ___________________Chip Information TRANSISTOR COUNT: 6821 INCHES MILLIMETERS DIM MIN MAX MIN MAX A 0.061 0.068 1.55 1.73 A1 0.004 ...

Page 16

Low-Power, 8-Bit Quad DAC with Rail-to-Rail Output Buffers ________________________________________________________Package Information ________________________________________________________Package Information Maxim cannot assume responsibility for use of any circuitry other than circuitry ...

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