MAX6960 MAXIM [Maxim Integrated Products], MAX6960 Datasheet - Page 17

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MAX6960

Manufacturer Part Number
MAX6960
Description
4-Wire Serially Interfaced 8 x 8 Matrix Graphic LED Drivers
Manufacturer
MAXIM [Maxim Integrated Products]
Datasheet

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Table 12. Power-Up Configuration
*When reading from the global registers, only the master MAX6960 (whose driver address is 0x00) responds.
Table 13. Global Driver Devices Format
Table 14. Global Driver Rows Format
On power-up, all control registers are reset (Table 12),
and the MAX6960 defaults to driver address 0 within a
panel of 256 drivers, monocolor, 1-bit-per-pixel, in one
row. The 3-wire interface automatically performs a con-
figuration on all interconnected MAX6960s after power-
up, reassigning the driver address allocation according
to the 3-wire interface interconnections. After perform-
ing the driver address allocation, the MAX6960 enters
shutdown mode.
Driver address (read only)
Pixel intensity scale
Panel intensity
Digit 0 intensity
Digit 1 intensity
Fault
Global driver indirect address
Global display indirect address
LSB
Global display indirect address
MSB
Global plane counter
Global panel configuration
Global driver devices
Global driver rows
REGISTER FUNCTION
Global driver devices
Global driver rows
______________________________________________________________________________________
REGISTER
REGISTER
Initial Power-Up
Address 0
Arithmetic for red and green
128/256 intensity
Full 255/256
Full 255/256
No faults
Address 0x00
Address 0x0000
Manual selection to plane 0
Shutdown mode,
ripple sync enabled,
mux flip enabled,
color is mono,
4 display planes/1 bit per
pixel
256 drivers interconnected
256 drivers in a row
POWER-UP CONDITION
8 x 8 Matrix Graphic LED Drivers
CODE (HEX)
CODE (HEX)
ADDRESS
ADDRESS
0x0F
4-Wire Serially Interfaced
0x0E
CODE (HEX)
ADDRESS
The MAX6960s driving a display panel must be config-
ured before the panel can be used to display images.
The configuration involves the global panel configura-
tion register (Table 15–Table 22), the global driver
devices register (Table 13), and the global driver rows
register (Table 14).
0x0A
0x0B
0x0D
0x00
0x01
0x02
0x03
0x04
0x05
0x08
0x09
0x0E
0x0F
MSB
MS
D7
D7
D7
D6
D6
0
X
1
1
1
0
0
0
X
0
0
1
1
8-bit global driver devices 0x00 to 0xFF
8-bit global driver rows 0x00 to 0xFF
D6
X
X
X
0
0
1
1
0
0
0
0
1
1
D5
D5
REGISTER DATA
REGISTER DATA
Device Configuration
D5
0
X
0
1
1
X
0
0
0
0
1
1
1
D4
D4
REGISTER DATA
D4
X
X
0
0
1
1
0
0
0
0
1
1
1
D3
D3
D3
X
X
X
0
0
1
1
0
0
0
0
1
1
D2
D2
D2
X
X
X
0
0
1
1
0
0
0
0
1
1
D1
D1
D1
X
0
0
0
1
1
0
0
0
0
0
1
1
LSB
LSB
D0
D0
D0
0
0
0
1
1
0
0
0
0
0
0
1
1
17

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