DAC7528UB BURR-BROWN [Burr-Brown Corporation], DAC7528UB Datasheet - Page 5

• Manufacturer Part Number: DAC7528UB
• Description: CMOS Dual 8-Bit Buffered Multiplying DIGITAL-TO-ANALOG CONVERTER
• Manufacturer: BURR-BROWN [Burr-Brown Corporation]

DISCUSSION OF
SPECIFICATIONS
RELATIVE ACCURACY
This term, also known as end point linearity or integral
linearity, describes the transfer function of analog output to
digital input code. Relative accuracy describes the deviation
from a straight line, after zero and full scale errors have been
adjusted to zero.
DIFFERENTIAL NONLINEARITY
Differential nonlinearity is the deviation from an ideal 1LSB
change in the output when the input code changes by 1LSB.
A differential nonlinearity specification of 1LSB maximum
guarantees monotonicity.
GAIN ERROR
Gain error is the difference between the full-scale DAC
output and the ideal value. The ideal full scale output value
for the DAC7528 is –(255/256)V
adjusted to zero using external trims as shown in Figure 4.
OUTPUT LEAKAGE CURRENT
The current which appears at I
DAC loaded with all zeros.
OUTPUT CAPACITANCE
The parasitic capacitance measured from I
AGND.
CHANNEL-TO-CHANNEL ISOLATION
The AC output error due to capacitive coupling from DAC
A to DAC B or DAC B to DAC A.
AC FEEDTHROUGH ERROR
The AC output error due to capacitive coupling from V
to I
OUTPUT CURRENT SETTLING TIME
The time required for the output current to settle to within
DIGITAL-TO-ANALOG IMPULSE
The integrated area of the glitch pulse measured in nanovolt-
seconds. The key contributor to digital-to-analog glitch is
charge injected by digital logic switching transients.
DIGITAL CROSSTALK
Glitch impulse measured at the output of one DAC but
caused by a full scale transition on the other DAC. The
integrated area of the glitch pulse is measured in nanovolt-
seconds.
0.195% of final value for a full scale step.
OUT
with the DAC loaded with all zeros.
OUT A
REF
. Gain error may be
and I
OUT A
OUT B
or I
with the
OUT B
REF
to
5
CIRCUIT DESCRIPTION
Figure 1 shows a simplified schematic of one half of a
DAC7528. The current from the V
between I
CMOS switches. This maintains a constant current in each
leg of the ladder regardless of the input code. The input
resistance at V
by either a voltage or current, AC or DC, positive or
negative polarity, and have a voltage range up to 20V.
FIGURE 1. Equivalent Circuit for DAC A.
A CMOS switch transistor, included in series with the ladder
terminating resistor and in series with the feedback resistor,
R
resistance of the ladder switches.
Figure 2 shows an equivalent circuit for DAC A. C
output capacitance due to the N-channel switches and varies
from about 30pF to 70pF with digital input code. The current
source I
leakages to the substrate. I
10 C. R
it varies with input code.
FIGURE 2. Simplified Circuit Diagram for DAC A.
INSTALLATION
ESD PROTECTION
All digital inputs of the DAC7528 incorporate on-chip ESD
protection circuitry. This protection is designed to withstand
2.5kV (using the Human Body Model, 100pF and 1500 ).
However, industry standard ESD protection methods should
be used when handling or storing these components. When
not in use, devices should be stored in conductive foam or
rails. The foam or rails should be discharged to the destina-
tion socket potential before devices are removed.
FB A
V
REF A
V
(MSB)
REF A
DB7
, compensates for the temperature drift of the ON
O
LKG
R
2R
OUT A
is the equivalent output resistance of the D/A and
R
is the combination of surface and junction
REF A
DB6
and AGND by 8 single-pole double-throw
256
D
2R
IN
R
is therefore constant and can be driven
x
V
DB5
REF
R
LKG
2R
R
DAC7528
approximately doubles every
R
O
(LSB)
DB0
REF A
I
2R
LKG
pin is switched
2R
R
C
OUT
OUT
R
R
I
AGND
OUT A
FB A
AGND
I
R
OUT A
is the
FB A
®