DAC8560A BURR-BROWN [Burr-Brown Corporation], DAC8560A Datasheet - Page 19

• Manufacturer Part Number: DAC8560A
• Manufacturer: BURR-BROWN [Burr-Brown Corporation]

INTERNAL REFERENCE
The DAC8560 includes a 2.5V internal reference that
is enabled by default. The internal reference is
externally available at the V
100nF capacitor is recommended between the
reference output and GND for noise filtering.
The internal reference of the DAC8560 is a bipolar
transistor-based,
reference. The basic bandgap topology is shown in
Figure
that the current density of Q
Q
(V
and is forced across resistor R
gained up and added to the base-emitter voltage of
Q
The resulting output voltage is virtually independent
of temperature. The short-circuit current is limited by
design to approximately 100mA.
Enable/Disable Internal Reference
The DAC8560 internal reference is enabled by
default; however, the reference can be disabled for
debugging
command requiring at least two additional SCLK
cycles at the end of the 24-bit write sequence (see
Serial Interface
internal reference. For proper operation, a total of at
least 26 SCLK cycles are required for each
enable/disable internal reference update sequence,
during which SYNC must be held low. To disable the
internal reference, execute the write sequence
illustrated in
additional SCLK falling edges while SYNC is low.
DB23
DB23
DB23
2
2
0
0
0
BE1
. The difference of the two base-emitter voltages
, which has a negative temperature coefficient.
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- V
1
1
1
64. Transistors Q
BE2
0
0
0
) has a positive temperature coefficient
or
Table 1
0
0
0
section) must be used to disable the
Table 2. Enabling the DAC8560 Internal Reference (Write Sequence 1 of 2)
Table 3. Enabling the DAC8560 Internal Reference (Write Sequence 2 of 2)
evaluation
Table 1. Write Sequence for Disabling the DAC8560 Internal Reference
precision
1
1
1
0
1
0
followed by at least two
1
and Q
1
0
0
0
is greater than that of
purposes.
REF
bandgap
2
1
0
0
1
. This voltage is
pin. A minimum
are biased such
0
0
0
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A
0
0
0
voltage
serial
0
0
0
0
0
0
0
0
0
To then enable the reference, either perform a
power-cycle to reset the device, or sequentially
execute the two write sequences in
Table
followed by at least two additional SCLK falling
edges while SYNC remains low.
During the time that the internal reference is
disabled, the DAC will function normally using an
external reference. At this point, the internal
reference is disconnected from the V
(tri-state). Do not attempt to drive the V
externally and internally at the same time indefinitely.
Figure 64. Simplified Schematic of the Bandgap
1
1
1
Q
1
3. Each of these write sequences must be
0
0
0
1
0
0
0
R
N
2
0
0
0
R
1
Reference
0
0
0
Q
2
0
0
0
0
0
0
SLAS464 – DECEMBER 2006
0
0
0
Reference
Disable
Table 2
0
0
0
DAC8560
REF
REF
0
0
0
V
REF
DB0
DB0
DB0
and
pin
pin
1
0
1
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