MCP434X MICROCHIP [Microchip Technology], MCP434X Datasheet - Page 40
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MCP434X
Manufacturer Part Number
MCP434X
Description
7/8-Bit Quad SPI Digital POT with Non-Volatile Memory
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.MCP434X.pdf
(80 pages)
MCP434X/436X
5.2
Each tap point (between the R
connection point for an analog switch. The opposite
side of the analog switch is connected to a common
signal which is connected to the Terminal W (Wiper)
pin.
A value in the volatile wiper register selects which
analog switch to close, connecting the W terminal to
the selected node of the resistor ladder.
The wiper can connect directly to Terminal B or to
Terminal A. A zero scale connections, connects the
Terminal W (wiper) to Terminal B (wiper setting of
000h). A full scale connections, connects the Terminal
W (wiper) to Terminal A (wiper setting of 100h or 80h).
In these configurations the only resistance between the
Terminal W and the other Terminal (A or B) is that of the
analog switches.
A wiper setting value greater than full scale (wiper
setting of 100h for 8-bit device or 80h for 7-bit devices)
will also be a Full Scale setting (Terminal W (wiper)
connected to Terminal A).
wiper setting map.
Equation 5-2
determine the resistance between the wiper and
terminal B.
EQUATION 5-2:
TABLE 5-1:
DS22233A-page 40
3FFh –
07Fh –
03Fh –
Wiper Setting
081h
080h
041h
040h
001h
000h
7-bit
N = 0 to 256 (decimal)
N = 0 to 128 (decimal)
R
R
Wiper
WB
WB
3FFh –
0FFh –
07Fh –
101h
100h
081h
080h
001h
000h
8-bit
=
=
illustrates the calculation used to
R
------------- -
(
R
------------- -
(
256
128
AB
AB
VOLATILE WIPER VALUE VS.
WIPER POSITION MAP
Reserved (Full Scale (W = A)),
Increment and Decrement
commands ignored
Full Scale (W = A),
Increment commands ignored
W = N
W = N (Mid Scale)
W = N
Zero Scale (W = B)
Decrement command ignored
N
N
)
)
+
+
R
WB
R
R
W
W
Table 5-1
CALCULATION
Properties
8-bit Device
7-bit Device
S
illustrates the full
resistors) is a
5.3
The MCP43XX device’s WiperLock technology allows
application-specific calibration settings to be secured in
the EEPROM without requiring the use of an additional
write-protect pin. There are four WiperLock Technology
configuration bits (WL0, WL1, WL2, and WL3). These
bits prevent the Non-Volatile and Volatile addresses
and bits for the specified resistor network from being
written.
The WiperLock technology prevents the serial
commands from doing the following:
• Changing a volatile wiper value
• Writing to the specified non-volatile wiper memory
• Changing the related volatile TCON register bits
For either Resistor Network 0, Resistor Network 1,
Resistor Network 2, or Resistor Network 3 (Potx), the
WLx bit controls the following:
• Non-Volatile Wiper Register
• Volatile Wiper Register
• Volatile TCON register bits RxHW, RxA, RxW, and
High Voltage commands are required to enable and
disable WiperLock. Please refer to the
Protect or WiperLock Technology (High Voltage)
command for operation.
5.3.1
The WiperLock Technology state is not affected by a
POR/BOR event. A POR/BOR event will load the
Volatile Wiper register value with the Non-Volatile
Wiper register value, refer to Section 4.1.
location
RxB
WiperLock™ Technology
POR/BOR OPERATION WHEN
WIPERLOCK TECHNOLOGY
ENABLED
© 2009 Microchip Technology Inc.
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