DAC7800_04 BURR-BROWN [Burr-Brown Corporation], DAC7800_04 Datasheet - Page 9

• Manufacturer Part Number: DAC7800_04
• Description: Dual Monolithic CMOS 12-Bit Multiplying DIGITAL-TO-ANALOG CONVERTERS
• Manufacturer: BURR-BROWN [Burr-Brown Corporation]

DGND should be connected together at one point only,
preferably at the power-supply ground point. Separate re-
turns minimize current flow in low-level signal paths if properly
connected. Output op amp analog common (+ input) should
be connected as near to the AGND pins of the DAC780x as
possible.
WIRING PRECAUTIONS
To minimize AC feedthrough when designing a PC board,
care should be taken to minimize capacitive coupling be-
tween the V
coupling between DACs may compromise the channel-to-
channel isolation. Coupling from any of the digital control or
data lines might degrade the glitch and digital crosstalk
performance. Solder the DAC780x directly into the PC board
without a socket. Sockets add parasitic capacitance (which
can degrade AC performance).
AMPLIFIER OFFSET VOLTAGE
The output amplifier used with the DAC780x should have low
input offset voltage to preserve the transfer function linearity.
The voltage output of the amplifier has an error component
which is the offset voltage of the op amp multiplied by
the “noise gain” of the circuit. This “noise gain” is equal to
(R
I
nonlinearity occurs due to the output impedance varying with
code. If the 0 code case is excluded (where R
R
between 4/3 and 2. In addition, the variation of R
with code, and the largest steps in R
transitions where the worst differential nonlinearity is also
likely to be experienced. The nonlinearity seen at the amplifier
output is 2V
nonlinearity the op amp offset should be much less than
1/2 LSB.
UNIPOLAR CONFIGURATION
Figure 3 shows DAC780x in a typical unipolar (two-quadrant)
multiplying configuration. The analog output values versus
digital input code are listed in Table II. The operational
amplifiers used in this circuit can be single amplifiers such as
the OPA602, or a dual amplifier such as the OPA2107. C1
and C2 provide phase compensation to minimize settling time
and overshoot when using a high speed operational amplifier.
If an application requires the DAC to have zero gain error, the
circuit shown in Figure 4 may be used. Resistors R
induce a positive gain error greater than worst-case initial
negative gain error. Trim resistors R
variable negative gain error and have sufficient trim range to
correct for the worst-case initial positive gain error plus the
error produced by R
BIPOLAR CONFIGURATION
See Figure 5 for the DAC780x in a typical bipolar (four-
quadrant) multiplying configuration. See Table III for the
listing of the analog output values versus digital input code.
DAC7800, 7801, 7802
OUT
O
F
/R
will vary from R-3R providing a “noise gain” variation
terminal and R
O
+ 1) where R
SBAS005A
REF
OS
– 4V
lines and the I
F
is the feedback network impedance. The
OS
2
O
and R
/3 = 2V
is the output impedance of the DAC
4
.
OUT
OS
/3. Thus, to maintain good
lines. Similarly, capacitive
O
1
occur at major code
and R
O
= infinity), the
O
3
is nonlinear
provide a
2
and R
www.ti.com
4
TABLE II. Unipolar Output Code.
FIGURE 4. Unipolar Configuration with Gain Trim.
The operational amplifiers used in this circuit can be single
amplifiers such as the OPA602, a dual amplifier such as the
OPA2107, or a quad amplifier like the OPA404. C1 and C2
provide phase compensation to minimize settling time and
overshoot when using a high speed operational amplifier. The
bipolar offset resistors R
matched to 0.01% to ensure the specified gain error perfor-
mance.
FIGURE 3. Unipolar Configuration.
1µF
1µF
C
C
D
D
MSB
DGND
+
+
+5V
+5V
1111 1111 1111
1000 0000 0000
0000 0000 0001
0000 0000 0000
DGND
DATA INPUT
V
DAC780X
V
DAC780X
DD
DD
V
REF A
DAC A
DAC B
DAC A
DAC B
V
V
V
IN A
V
V
IN B
REF B
REF A
R
100
REF B
R
100
1
3
LSB
5
–R
7
and R
R
I
I
AGND A
R
AGND B
A1, A2 OPA602 or 1/2 OPA2107.
DAC7802 has a single analog
common, AGND.
R
I
R
I
A1, A2 OPA602 or 1/2 OPA2107.
DAC7802 has a single analog
common, AGND.
AGND A
AGND B
OUT A
OUT B
OUT A
OUT B
FB A
FB B
FB A
FB B
–V
–V
–V
0 Volts
REF
REF
REF
47
47
ANALOG OUTPUT
8
R
R
–R
2
4
(4095/4096)
(2048/4096) = –1/2V
(1/4096)
C2
10pF
C1
10pF
10
should be ratio-
C1 10pF
C2 10pF
–
+
–
+
–
+
–
+
A1
A2
A1
A2
V
V
V
V
OUT A
OUT B
OUT B
OUT A
REF
9