DAC8822QB BURR-BROWN [Burr-Brown Corporation], DAC8822QB Datasheet - Page 16

• Manufacturer Part Number: DAC8822QB
• Description: 16-Bit, Dual, Parallel Input, Multiplying Digital-to-Analog Converter
• Manufacturer: BURR-BROWN [Burr-Brown Corporation]

DAC8822
SBAS390A – DECEMBER 2006 – REVISED MARCH 2007
16
DIGITAL INTERFACE
The parallel bus interface of the DAC8822 is comprised of a 16-bit data bus D0—D15, address lines A0 and A1,
and a WR control signal. Timing and control functionality are shown in
Table
improper data to an undesired input register.
Both channels of the DAC8822 can be simultaneously updated by control of the LDAC signal, as shown in
Figure
either zero scale or midscale codes of both the input and DAC registers.
STABILITY CIRCUIT
For a current-to-voltage (I/V) design, as shown in
connection with the inverting node of the op amp should be as short as possible and laid out according to
correct printed circuit board (PCB) layout design. For each code change, there is an output step function. If the
gain bandwidth product (GBP) of the op amp is limited and parasitic capacitance is excessive at the inverting
node, then gain peaking is possible. Therefore, a compensation capacitor C
the design for circuit stability, as shown in
3. The address lines must be set up and stable before the WR signal goes low, to prevent loading
1. Reset control (RS) and reset select control (RSTSEL) signals are provided to allow user reset ability to
Figure 42. Gain Peaking Prevention Circuit with Compensation Capacitor
V
REF
U1
V
GND
V
V
REF
DD
DD
APPLICATION INFORMATION
R
DAC8822
OFS
Figure
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R
FB
42.
I
OUT
A/B
Figure
42, the DAC8822 current output (I
C
1
U2
OPA277
Figure
1
(4pF to 20pF, typ) can be added to
1, and described in
V
OUT
OUT
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Table 2
) and the
and