ATV2500B-15KM ATMEL [ATMEL Corporation], ATV2500B-15KM Datasheet - Page 10

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ATV2500B-15KM

Manufacturer Part Number
ATV2500B-15KM
Description
High-Speed High-Density UV Erasable Programmable Logic Device
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Power-Up Reset
The registers in the ATV2500Bs are designed to reset dur-
ing power up. At a point delayed slightly from V
V
state will depend on the polarity of the output buffer.
This feature is critical for state as nature of reset and the
uncertainty of how V
lowing conditions are required:
1. The V
2. After reset occurs, all input and feedback setup
3. The clock pin, and any signals from which clock
10
Parameter
t
V
RST
PRELOAD cycle
PR
Level forced on
RST
Odd I/O pin
times must be met before driving the clock pin or
terms high, and
terms are derived, must remain stable during t
, all registers will be reset to the low state. The output
V
V
V
V
during
IH
IH
IH
IH
/V
/V
/V
/V
CC
IL
IL
IL
IL
rise must be monotonic,
CC
Q Select Pin
actually rises in the system, the fol-
State
High
High
Low
Low
ATV2500B
Description
Power-Up Reset Time
Power-Up Reset Voltage
Even/Odd Select
High
High
Low
Low
CC
PR
crossing
.
Even Q1 state
after cycle
High/Low
X
X
X
Even Q2 state
after cycle
High/Low
X
X
X
Typ
600
3.8
Odd Q1 state
after cycle
High/Low
X
X
X
1000
Max
4.5
Odd Q2 state
after cycle
High/Low
Units
X
X
X
ns
V

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