DSP56004/D FREESCALE [Freescale Semiconductor, Inc], DSP56004/D Datasheet
DSP56004/D
Related parts for DSP56004/D
DSP56004/D Summary of contents
Page 1
... GDB PDB XDB YDB Program Program Decode Address 24 Controller Generator *Refer to Table 1 for memory configurations. , RESET Go to: www.freescale.com Order this document by: DSP56004/D, Rev. 3 DSP56004 16-Bit Bus 24-Bit Bus X Data Y Data Memory* Memory* Data ALU 56-bit MAC Two 56-Bit Accumulators AA0248 ...
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... For More Information On This Product, TABLE OF CONTENTS 1-800-521-6274 dsphelp@dsp.sps.mot.com http://www.motorola-dsp.com Logic State Signal State True Asserted False Deasserted True Asserted False Deasserted are defined by individual product specifications. OH DSP56004/D, Rev to: www.freescale.com Voltage ...
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... For More Information On This Product, Program X Data RAM ROM RAM 512 256 256 256 256 256 x log x 2 tables and ; Y data ROM is programmed with a sine table. 2 DSP56004/D, Rev to: www.freescale.com DSP56004 Features Y Data Boot-strap ROM ROM RAM 256 256 64 256 256 64 iii ...
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... Quad Flat Pack surface-mount package 2.20 mm (2.15–2.45 mm range); 0.65 mm lead pitch • Complete pinout compatibility between DSP56004, DSP56004ROM, DSP56007, and DSP56009 for easy upgrades • power supply iv For More Information On This Product Sony, and Matsushita audio DSP56004/D, Rev to: www.freescale.com MOTOROLA ...
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... DSP56004 User’s Memory, peripherals, and interfaces Manual DSP56004 Technical Electrical and timing specifications, Data and pin and package descriptions MOTOROLA For More Information On This Product, Description of Content DSP56004/D, Rev to: www.freescale.com DSP56004 Product Documentation Order Number DSP56KFAMUM/AD DSP56004UM/AD DSP56004/D v ...
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... Freescale Semiconductor, Inc. DSP56004 Product Documentation vi For More Information On This Product, DSP56004/D, Rev to: www.freescale.com MOTOROLA ...
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... General Purpose Input/Output (GPIO) On-Chip Emulation (OnCE) port Total MOTOROLA For More Information On This Product, SECTION 1 Number of Signals DSP56004/D, Rev to: www.freescale.com Detailed Description Table 1-2 Table 1-3 Table 1-4 Table 1-5 and Table 1-6 Table 1-7 Table 1-8 Table 1-9 and Table 1-10 Table 1-11 Table 1-12 1-1 ...
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... Serial Audio Interface PLL Rec0 Rec1 Tran0 Tran1 Tran2 Port A External Memory Interface GPIO Mode/Interrupt OnCE™ Control Port Reset 80 signals DSP56004/D, Rev to: www.freescale.com MOSI/HA0 SS/HA2 MISO/SDA SCK/SCL HREQ WSR SCKR SDI0 SDI1 WST SCKT SDO0 SDO1 SDO2 4 GPIO0–GPIO3 ...
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... Q provides isolated ground for sections of the address A provides isolated ground for sections of the data bus I/O D provides isolated ground for the SHI and SAI. This S DSP56004/D, Rev to: www.freescale.com Signal/Connection Descriptions Power should be CCP 1-3 ...
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... When the bit is cleared, the PLL is disabled and the DSP’s internal clocks are derived from the clock connected to the EXTAL signal. After hardware RESET is deasserted, the PINIT signal is ignored. DSP56004/D, Rev to: www.freescale.com . The required capacitor or GND. MOTOROLA ...
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... Memory Chip Select 0—This line functions as memory chip select 0 for SRAM accesses. Memory Write Strobe—This line is asserted when writing to external memory. Memory Read Strobe—This line is asserted when reading external memory. DSP56004/D, Rev to: www.freescale.com Signal/Connection Descriptions External Memory Interface (EMI) 1-5 ...
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... Driven High Driven High Driven High Driven High Driven High Driven High Driven High Driven High Driven High Driven High DSP56004/D, Rev to: www.freescale.com Stop Mode Previous State Previous State Previous State Previous State Driven High Driven High Previous State Previous State ...
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... While the DSP is in the Stop mode, asserting IRQA gates on the oscillator and, after a clock stabilization delay, enables clocks to the processor and peripherals. Hardware reset causes this input to function as MODA. DSP56004/D, Rev to: www.freescale.com Signal/Connection Descriptions Interrupt and Mode Control 1-7 ...
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... However, as the fall time of the interrupt signal increases, the probability that noise on IRQB will generate multiple interrupts also increases. Hardware reset causes this input to function as MODB. DSP56004/D, Rev to: www.freescale.com MOTOROLA ...
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... RESET will generate multiple resets increases with increasing rise time of the RESET signal. For proper hardware reset to occur, the clock must be active, since a number of clock ticks are required for proper propagation of the hardware Reset state. DSP56004/D, Rev to: www.freescale.com Signal/Connection Descriptions Interrupt and Mode Control 1-9 ...
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... Fosc frequency is / for the SPI mode and mode. This signal is tri-stated during hardware reset, software reset, or individual reset (no need for external pull-up in this state). DSP56004/D, Rev to: www.freescale.com Fosc / for the 6 Fosc / for the 5 MOTOROLA ...
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... HA0 is ignored when the SHI is configured for the I Note: This signal is tri-stated during hardware reset, software reset, or individual reset (no need for external pull-up in this state). DSP56004/D, Rev to: www.freescale.com Signal/Connection Descriptions Serial Host Interface (SHI mode mode ...
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... HREQ to proceed to the next transfer. Note: This signal is tri-stated during hardware, software, individual reset, or when the HREQ[1:0] bits (in the HCSR) are cleared (no need for external pull-up in this state). DSP56004/D, Rev to: www.freescale.com Slave mode, the 2 C Master mode ...
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... Note: SCKR is high impedance if all receivers are disabled (individual reset) and during hardware or software reset, or while the DSP is in the Stop state. DSP56004/D, Rev to: www.freescale.com Signal/Connection Descriptions Serial Audio Interface (SAI) 1-13 ...
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... WSR is high impedance if all receivers are disabled (individual reset), during hardware reset, during software reset, or while the DSP is in the Stop state. While in the high impedance state, the internal input buffer is disconnected from the signal and no external pull-up is necessary. DSP56004/D, Rev to: www.freescale.com MOTOROLA ...
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... WST is high impedance if all transmitters are disabled (individual reset), during hardware or software reset, or while the DSP is in the Stop state. While in the high impedance state, the internal input buffer is disconnected from the pin and no external pull-up is necessary. DSP56004/D, Rev to: www.freescale.com Signal/Connection Descriptions Serial Audio Interface (SAI) 1-15 ...
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... OS1 signal. When switching from output to input, the signal is tri-stated. Note: If the OnCE port is in use, an external pull-down resistor should be attached to the DSI/OS0 signal. If the OnCE port is not in use, the resistor is not required. DSP56004/D, Rev to: www.freescale.com MOTOROLA ...
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... OnCE port is ready to receive the data to be written; after the data is written, another acknowledge pulse will be provided. Note: During hardware reset and when idle, the DSO line is held high. DSP56004/D, Rev to: www.freescale.com Signal/Connection Descriptions TM ) Port 1-17 ...
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... DR must be deasserted before sending the first OnCE port command. For more information, see Methods Of Entering The Debug Mode in the Manual . Note: If the OnCE port is not in use, an external pull-up resistor should be attached to the DR line. DSP56004/D, Rev to: www.freescale.com DSP56000 Family MOTOROLA ...
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... Therefore, a “maximum” value for a specification will never occur in the same device that has a “minimum” value for another specification; adding a maximum to a minimum represents a condition that can never exist. MOTOROLA For More Information On This Product, SECTION 2 CAUTION ). CC DSP56004/D, Rev to: www.freescale.com 2-1 ...
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... V IN (GND – 0. (GND – 0.25 and GND STG Symbol QFP Value 70 16 3.2 JT DSP56004/D, Rev to: www.freescale.com ) dc Value Unit –0 0.25 –40 to +125 C –40 to +120 C –55 to +125 QFP Value Unit ˚ 45.1 C/W ˚ ...
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... OL 4 — 75 105 — 103 — — 18 — 5 110 — 5 DSP56004/D, Rev to: www.freescale.com Specifications DC Electrical Characteristics 81 MHz Unit Min Typ Max 5.5 4.75 5.0 5. 4.0 — 2.5 — 3.5 — ...
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... Min Typ Max Min Typ Max — 0.7 1.1 — 1.0 — 10 — — minimum of 2.4 V for all pins, except EXTAL, RESET, IH reference levels set at 0.8 V and 2.0 V, respectively. DSP56004/D, Rev. 3 For More Information On This Product, Go to: www.freescale.com 81 MHz Unit Min Typ Max 1.5 — 1.2 2.0 mA — — 10 — ...
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... ET H 0.48 0.467 0.48 0.467 CYC 50 MHz Sym. Min Max 9.3 8.5 235500 9.3 8.5 235500 DSP56004/D, Rev to: www.freescale.com Specifications Internal Clocks Expression Maximum T 0. 0.533 0. 0.533 (DF /MF MHz 81 MHz ...
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... CYC 40 30.3 40 819200 30.3 819200 Expression Min PCAP @ > DSP56004/D, Rev to: www.freescale.com 66 MHz 81 MHz Unit Max Min Max 12.3 ns 12.3 409600 ns 24.7 ns 24.7 819200 ns AA0250 Max Unit MHz 340 MF 480 pF 380 MF 970 pF ) for ...
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... Long interrupts are recommended when using Level-sensitive mode. RESET MOTOROLA For More Information On This Product, RESET, Stop, Mode Select, and Interrupt Timing Min 25 2500 Figure 2-2 Reset Timing DSP56004/D, Rev to: www.freescale.com Specifications = TTL Loads) L All frequencies Unit Max T — — ns ...
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... IRQA Figure 2-6 Recovery from Stop State Using IRQA IRQA Figure 2-7 Recovery from Stop State Using IRQA Interrupt Service 2-8 For More Information On This Product IHM V ILM 16 16A 22 General Purpose I/O 27 DSP56004/D, Rev to: www.freescale.com V IHR IRQA IRQB NMI V IL AA0252 AA0253 ...
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... C slow 4 T – fast 3 T – slow – fast – DSP56004/D, Rev to: www.freescale.com Specifications 66 MHz 81 MHz Unit — 61 — 49.4 — ns — 46 — 37.0 — ns 124 — 90 — 70 — 60 — 45 — ...
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... T – slow 5 T – fast 3 T – slow 12 T 240 C fast 8 T 160 C DSP56004/D, Rev to: www.freescale.com 66 MHz 81 MHz Unit — 10 — 7.3 — ns — 2 — 0.2 — ns — 39 — 29.2 — ns — 24 — 16.9 — ns — 2 — ...
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... – fast – slow 7 T – 13 127 C fast 5 T – DSP56004/D, Rev to: www.freescale.com Specifications 66 MHz 81 MHz Unit — 125 — 100 — ns — 80 — 63.1 — ns — 32 — 24 — ns — 17 — 11.7 — ns — ...
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... External Memory Interface (EMI) DRAM Timing 48 MRAS 65 MCAS 55 MA0–MA10 MWR MRD MD0–MD7 Figure 2-8 DRAM Single Read Cycle 2-12 For More Information On This Product Row Address Last Column Address Data In DSP56004/D, Rev to: www.freescale.com AA0257 MOTOROLA ...
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... For More Information On This Product, External Memory Interface (EMI) DRAM Timing Col. Address Col. Address Data In Data DSP56004/D, Rev to: www.freescale.com Specifications Last Column Address Data In AA0263 2-13 ...
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... MRAS MCAS 55 MA0–MA10 MWR MRD MD0–MD7 Figure 2-10 DRAM Single Write Cycle 2-14 For More Information On This Product Row Address Column Address Data Out DSP56004/D, Rev to: www.freescale.com AA0264 MOTOROLA ...
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... For More Information On This Product, External Memory Interface (EMI) DRAM Timing Col. Address Col. Address Data Out Data Out DSP56004/D, Rev to: www.freescale.com Specifications Last Column Address Data Out AA0265 2-15 ...
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... C slow 6 T – 15 105 C fast 4 T – slow 5 T – fast 3 T – DSP56004/D, Rev. 3 For More Information On This Product, Go to: www.freescale.com 66 MHz 81 MHz Unit Max — 84 — 67.1 — ns — 54 — 42.4 — ns — 71 — 54.7 — ns — 38 — ...
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... – –15 + — – — DSP56004/D, Rev to: www.freescale.com Specifications 85 AA0266 66 MHz 81 MHz Unit — 50 — 38.4 — ns — 10 — 5.5 — ns — 23 — 20 — ns — 19 — 13.7 — ns — ...
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... – — — H — — H — T – Figure 2-13 SRAM Read Cycle DSP56004/D, Rev to: www.freescale.com 66 MHz 81 MHz Unit — 0 — 0 — ns — 39 — 29.2 — ns — 18 — 11.0 — ns — 2 — 0.2 — — ...
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... MCS2 MCAS MA17/ / MCS1 MRAS MCS0 WR RD MD0–MD7 MOTOROLA For More Information On This Product, External Memory Interface (EMI) SRAM Timing 100 102 Data Out 104 101 Figure 2-14 SRAM Write Cycle DSP56004/D, Rev to: www.freescale.com Specifications 95 94 103 AA0268 2-19 ...
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... — H master 19 — slave 12 12 slave 12 12 DSP56004/D, Rev. 3 For More Information On This Product, Go to: www.freescale.com 66 MHz 81 MHz Unit — 61 — 49.4 — ns — 51 — 42 — ns — 22 — 16.7 — ns — 18 — 14.7 — ...
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... WSR (Output) Figure 2-15 SAI Receiver Timing MOTOROLA For More Information On This Product, Serial Audio Interface (SAI) Timing 111 112 114 113 111 113 114 112 115 116 Valid 119 118 Valid DSP56004/D, Rev to: www.freescale.com Specifications 114 114 117 AA0269 2-21 ...
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... SCKT (TCKP = 0) SDO0–SDO2 (Data Output) WST (Input) WST (Output) Figure 2-16 SAI Transmitter Timing 2-22 For More Information On This Product, 111 112 114 113 111 113 114 112 121 124 123 Valid DSP56004/D, Rev to: www.freescale.com 114 114 122 AA0270 MOTOROLA ...
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... C bypassed narrow 216 246 C H wide 511 541 — 2000 — DSP56004/D, Rev to: www.freescale.com Specifications 66 MHz 81 MHz Unit Max 0 — 0 — — 20 — 100 — 100 — 100 ns — — — ...
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... — narrow 216 — wide 511 — DSP56004/D, Rev. 3 For More Information On This Product, Go to: www.freescale.com 66 MHz 81 MHz Unit Max — 58 — 53.5 — ns — 58 — 53.5 — ns — 58 — 53.5 — ns — ...
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... C H wide 219 C H 169 0 106 SPICC DSP56004/D, Rev to: www.freescale.com Specifications 66 MHz 81 MHz Unit Max — 0 — 0 — ns — 57 — 57 — ns — 163 — 163 — ns — 0 — 0 — ns — 57 — ...
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... HTX is written at least T SPICC C 143 142 144 142 144 143 148 149 MSB Valid 152 MSB 163 DSP56004/D, Rev. 3 For More Information On This Product, Go to: www.freescale.com 66 MHz 81 MHz Unit Max — 0 — 0 — the user assures that the HTX ...
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... MOTOROLA For More Information On This Product, Serial Host Interface (SHI) SPI Protocol Timing 143 144 142 144 148 149 MSB Valid 152 MSB 162 163 DSP56004/D, Rev to: www.freescale.com Specifications 141 144 141 144 148 149 LSB Valid 153 LSB AA0272 2-27 ...
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... Figure 2-19 SPI Slave Timing (CPHA = 0) 2-28 For More Information On This Product, 143 144 142 144 143 152 153 153 MSB 148 149 MSB Valid DSP56004/D, Rev to: www.freescale.com 141 147 144 160 141 144 151 LSB 149 LSB Valid 159 AA0273 MOTOROLA ...
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... For More Information On This Product, Serial Host Interface (SHI) SPI Protocol Timing 143 144 142 144 143 152 MSB 148 149 MSB Valid 157 DSP56004/D, Rev to: www.freescale.com Specifications 141 147 144 144 153 151 LSB 148 149 LSB Valid 158 ...
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... C PROTOCOL TIMING = 0 0 OLS Protocol Timing 2 Standard 400 pF 100 kHz for a detailed description of how to use the different filtering DSP56004/D, Rev to: www.freescale.com All frequencies Symbol Unit Min Max — — — 100 ns t 10.0 — s SCL t 4 ...
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... C slave. : Master Slave T172 Filter Filter Slave issible Mode Mode Bypassed Bypassed Narrow Narrow Wide Wide DSP56004/D, Rev to: www.freescale.com Specifications 2 C Protocol Timing + 1 to ),the pull- L Resulting Limitations Min. Maximum Perm- T172 Serial Master Frequency ...
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... narrow wide bypassed 12 narrow 50 wide 150 DSP56004/D, Rev. 3 For More Information On This Product, Go to: www.freescale.com and R of the bus, the MHz 66 MHz 81 MHz U Min Max Min Max Min Max — 0 — 0 — ...
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... 20) L 2000 20 + 0.1 (C – 50) L 2000 bypassed narrow wide DSP56004/D, Rev to: www.freescale.com Specifications 2 C Protocol Timing MHz 66 MHz 81 MHz U n Min Max Min Max Min Max 332 — 318 — 313 — ns 352 — ...
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... CCP C narrow CCP C wide CCP C DSP56004/D, Rev. 3 For More Information On This Product, Go to: www.freescale.com MHz 66 MHz 81 MHz U n Min Max Min Max Min Max 0 — 0 — 0 — — 0 — 0 — ...
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... MSB LSB 186 182 189 184 2 Figure 2- Timing DSP56004/D, Rev to: www.freescale.com Specifications 2 C Protocol Timing MHz 66 MHz 81 MHz U n Min Max Min Max Min Max 0 — ...
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... Valid when the ratio between EXTAL frequency and internal clock frequency equals 1 2-36 For More Information On This Product, Table 2-16 GPIO Timing Expression 204 Valid Figure 2-22 GPIO Timing DSP56004/D, Rev to: www.freescale.com All frequencies Unit Min Max — — — ...
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... Table 2-17 OnCE Timing Min 40 40 200 5 T — — T – DSP56004/D, Rev to: www.freescale.com Specifications All frequencies Unit Max — ns — ns — ns — — ns — ns — — — ...
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... 65553 246 230 231 232 DSP56004/D, Rev to: www.freescale.com Unit Max 12 T – — ns — ns 65548 — — ...
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... MOTOROLA For More Information On This Product, On-Chip Emulation (OnCE ) Timing 233 240 ACK (Last) 237 (Last) 235 245 239 (Note 1) 240 (Note 1) 236 DSP56004/D, Rev to: www.freescale.com Specifications AA0278 (OS1 ACK 238 (OS0) (Note 1) AA0279 (Note 1) (OS0) AA0280 (DSCK Input) (DSO Output) ...
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... Figure 2-30 Synchronous Recovery from Wait State DR (Input) DSO (Output) Figure 2-31 Asynchronous Recovery from Wait State 2-40 For More Information On This Product, 242 244 T0, T2 T1, T3 248 246 247 248 249 DSP56004/D, Rev to: www.freescale.com 243 AA0282 (Next Command) AA0283 AA0284 AA0285 MOTOROLA ...
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... Freescale Semiconductor, Inc. DR (Input) DSO (Output) Figure 2-32 Asynchronous Recovery from Stop State MOTOROLA For More Information On This Product, On-Chip Emulation (OnCE ) Timing 250 251 DSP56004/D, Rev to: www.freescale.com Specifications AA0286 2-41 ...
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... Freescale Semiconductor, Inc. Specifications On-Chip Emulation (OnCE ) Timing 2-42 For More Information On This Product, DSP56004/D, Rev to: www.freescale.com MOTOROLA ...
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... This section provides information about the available packages for this product, including diagrams of the package pinouts and tables describing how the signals described in Section 1 are allocated. The DSP56004 is available in an 80-pin Plastic Quad Flat Pack (PQFP) package. MOTOROLA For More Information On This Product, SECTION 3 PACKAGING DSP56004/D, Rev to: www.freescale.com 3-1 ...
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... Note: An OVERBAR indicates the signal is asserted when the voltage = ground (active low). To simplify locating the pins, each fifth pin is shaded in the illustration. 3-2 For More Information On This Product, (Top View) Orientation Mark Figure 3-1 Top View DSP56004/D, Rev to: www.freescale.com 41 V CCS MODC/NMI MODB/IRQB MODA/IRQA ...
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... Note: An OVERBAR indicates the signal is asserted when the voltage = ground (active low). To simplify locating the pins, each fifth pin is shaded in the illustration. MOTOROLA For More Information On This Product, (Bottom View) Orientation Mark Figure 3-2 Bottom View DSP56004/D, Rev to: www.freescale.com Packaging Pin-out and Package Information 61 DR MD7 MD6 ...
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... SDO0 CCS 49 SCKT 76 50 WST 77 51 SCKR 78 52 GND CCQ 54 GND S DSP56004/D, Rev to: www.freescale.com Pin # Signal Name WSR SDI1 SDI0 DSO DSI/OS0 DSCK/OS1 DR MD7 MD6 MD5 MD4 GND D MD3 MD2 MD1 V CCD MD0 GND D GPIO3 GPIO2 ...
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... MCS2 80 MCS3 3 MD0 71 MD1 69 MD2 68 MD3 67 MD4 65 MD5 64 MD6 63 MD7 62 MISO 35 MODA 37 MODB 38 MODC 39 MOSI 41 MRAS 79 DSP56004/D, Rev to: www.freescale.com Packaging Pin-out and Package Information Signal Name Pin # MRD 77 MWR 78 NMI 39 OS0 59 OS1 60 PCAP 32 PINIT 30 RESET 36 SCK 26 SCKR 51 SCKT 49 SCL 26 SDA 35 ...
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... V CCD 66 GND CCQ GND CCP 31 GND CCS 48 34 GND 3-6 For More Information On This Product, Circuit Supplied Address Bus Buffers Data Bus Buffers Internal Logic PLL Serial Ports DSP56004/D, Rev to: www.freescale.com MOTOROLA ...
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... INCLUDE MOLD MISMATCH AND ARE DETERMINED AT DATUM PLANE -H-. 7. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION Q SHALL BE 0.08 TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. DSP56004/D, Rev to: www.freescale.com Packaging Pin-out and Package Information -A,B,D- DETAIL A ...
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... Specific part technical information or data sheets – Other information described by the system messages A total of three documents may be ordered per call. The DSP56004 80-pin PQFP package mechanical drawing is referenced as 841B-01. 3-8 For More Information On This Product, (602) 244-6591 DSP56004/D, Rev to: www.freescale.com MOTOROLA ...
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... Printed Circuit Board, analysis of the device thermal performance may need the additional modeling capability of a system level thermal simulation tool. MOTOROLA For More Information On This Product, SECTION can be obtained from the DSP56004/D, Rev to: www.freescale.com . For CA 4-1 ...
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... For More Information On This Product, do not satisfactorily answer whether the thermal determined by a thermocouple, T – T )/P . This value gives a better DSP56004/D, Rev to: www.freescale.com MOTOROLA ...
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... If multiple DSP56004 devices are on the same board, check for cross-talk or excessive spikes on the supplies due to synchronous operation of the devices. MOTOROLA For More Information On This Product, CAUTION precautions are advised and GND pins are less than 0.5 in per capacitor CC DSP56004/D, Rev to: www.freescale.com Design Considerations Electrical Design Considerations to avoid ). CC CC power source CC and GND pins ...
Page 78
... Minimize the capacitive load on the pins. • Connect the unused inputs to pull-up or pull-down resistors. • Disable unused peripherals. • Disable unused pin activity. 4-4 For More Information On This Product, – 5 5.5mA max) value reflects the typical possible CCI DSP56004/D, Rev to: www.freescale.com ) value CCItyp MOTOROLA ...
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... TP1 nop jmp MAIN MOTOROLA For More Information On This Product, Power Consumption Considerations r0,x:(r0)+ l:(r0)+,a x:(r0)+,x0 a,p:(r5) TP1 DSP56004/D, Rev to: www.freescale.com Design Considerations y:(r4)+,y0 4-5 ...
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... At the beginning of the hardware reset procedure, the device might consume significantly more current than the specified typical supply current. This is because of contentions among the internal nodes being affected by the hardware reset signal until they reach their final hardware reset state. 4-6 For More Information On This Product, DSP56004/D, Rev to: www.freescale.com MOTOROLA ...
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... For additional information on future part development request specific ROM-based support, call your local Motorola Semiconductor sales office or authorized distributor. MOTOROLA For More Information On This Product, SECTION 5 Package Type Pin Count 80 80 DSP56004/D, Rev to: www.freescale.com Frequency Order Number (MHz) 50 DSP56004FJ50 66 DSP56004FJ66 81 ...
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