MK61FX512VMD12 FREESCALE [Freescale Semiconductor, Inc], MK61FX512VMD12 Datasheet - Page 25

• Manufacturer Part Number: MK61FX512VMD12
• Description: K61 Sub-Family
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

2.
3.
4.
5.5 Power sequencing
Voltage supplies must be sequenced in the proper order to avoid damaging internal
diodes. There is no limit on how long after one supply powers up before the next supply
must power up. Note that V
The power-up sequence is:
The power-down sequence is the reverse:
6 Peripheral operating requirements and behaviors
6.1 Core modules
6.1.1 Debug trace timing specifications
Freescale Semiconductor, Inc.
1. V
2. V
3. V
4. V
1. V
2. V
3. V
4. V
Symbol
T
T
T
T
T
cyc
wh
Determined according to JEDEC Standard JESD51-8, Integrated Circuit Thermal Test Method Environmental
Conditions—Junction-to-Board.
Determined according to Method 1012.1 of MIL-STD 883, Test Method Standard, Microcircuits, with the cold plate
temperature used for the case temperature. The value includes the thermal resistance of the interface material
between the top of the package and the cold plate.
Determined according to JEDEC Standard JESD51-2, Integrated Circuits Thermal Test Method Environmental
Conditions—Natural Convection (Still Air).
wl
r
f
DD
DD_INT
DDA
DD_DDR
DD_DDR
DDA
DD_INT
DD
Clock period
Low pulse width
High pulse width
Clock and data rise time
Clock and data fall time
Description
Table 12. Debug trace operating behaviors
K61 Sub-Family Data Sheet, Rev. 4, 10/2012.
DD
and V
Table continues on the next page...
DD_INT
can use the same power source.
Peripheral operating requirements and behaviors
Frequency dependent
Min.
—
—
2
2
Max.
—
—
3
3
MHz
Unit
ns
ns
ns
ns
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