KSZ8842-PMBLAM MICREL [Micrel Semiconductor], KSZ8842-PMBLAM Datasheet - Page 52

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KSZ8842-PMBLAM

Manufacturer Part Number
KSZ8842-PMBLAM
Description
2-Port Ethernet Switch with PCI Interface
Manufacturer
MICREL [Micrel Semiconductor]
Datasheet
Micrel, Inc.
Memory BIST Info Register (Offset 0x0214): MBIR
The following table shows the register bit fields.
Global Reset Register (Offset 0x0216): GRR
This register holds control information programmed by the CPU to control the global soft reset function.
Switch Registers
Switch ID and Enable Register (Offset 0x0400): SIDER
This register contains the switch ID, and the switch-enable control.
October 2007
Bit
15 – 1
15 – 13
10 – 5
15 – 8
2 – 0
7 – 4
3 – 1
Bit
Bit
12
11
4
3
0
0
Default
Default
Default
0x00
0x88
0x0
0x4
000
0
R/W
R/W
R/W
RW
RW
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Description
Reserved
TXMBF TX Memory Bits Finish
When set, it indicates the Memory Built In Self Test has completed for the
TX Memory.
TXMBFA TX Memory Bits Fail
When set, it indicates the Memory Built In Self Test has failed.
Reserved
RXMBF RX Memory Bits Finish
When set, it indicates the Memory Built In Self Test has completed for the
RX Memory.
RXMBFA RX Memory Bits Fail
When set, it indicates the Memory Built In Self Test has failed.
Reserved
Description
Reserved
Global Soft Reset
1 = Software reset active
0 = Software reset inactive
Set two times to finish the software reset, this soft reset bit will reset PCI
control/status registers only.
Description
Family ID
Chip family
Chip ID
Revision ID
Start Switch
1 = start the chip
52
KSZ8842-PMQL/PMBL
M9999-100207-1.5

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