MPC801KG BURR-BROWN [Burr-Brown Corporation], MPC801KG Datasheet - Page 6

• Manufacturer Part Number: MPC801KG
• Description: High Speed CMOS ANALOG MULTIPLEXER
• Manufacturer: BURR-BROWN [Burr-Brown Corporation]

Source Characteristics
If the MPC801 is used for multiplexing high level signals of
1V to 10V full scale ranges, the foregoing precautions
should be taken, but the parameters are not as critical as for
low level signal applications.
FIGURE 3. Settling Time Effects (Single-ended).
FIGURE 4. Settling and Common-Mode Effects (Differential).
• The system DC common-mode rejection (CMR) can never
• Load impedances, differential and common-mode should
• The source impedance unbalance will produce offset,
• Keep source impedances as low as possible to minimize
• Minimize ground loops. If signal lines are shielded, ground
be better than the combined CMR of multiplexer and
driven load. System CMR will be less than the device
which has the lower CMR figure.
be 10
common-mode and channel-to-channel gain scatter
errors. Use sources which do not have large impedance
unbalances if at all possible.
resistive loading errors.
all shields to a common point at the system analog
common.
R
SOURCE
10
Source
or higher.
®
C
MPC801
S
RCM
S
C
CMS
Node A
C
LOAD
R
R
SA
SB
Load
Source
C
C
SA
SB
R
LOAD
6
SETTLING TIME
Settling time is the time required for the multiplexer to reach
and maintain an output within a specified error band of its
final value in response to a step input. The settling time of
the MPC801 is primarily due to the channel capacitance and
a combination of resistances which include the source and
load resistances.
If the parallel combination of the source and load resistance
times the total channel capacitance is kept small, then the
settling time is primarily affected by internal RCs. For the
MPC801, the internal capacitance is approximately 10pF
differential or 20pF single-ended. With external capacitance
neglected, the time constant of source resistance in parallel
with load resistance and the internal capacitance should be
kept less than 40ns. This means the source resistance should
be kept to less than 4k
maintain fast settling times.
ACCESS TIME
This is the time required for the CMOS FET to turn ON after
a new digital code has been applied to the Channel Address
inputs. It is measured from the 50 percent point of the
address input signal to the 90 percent point of the analog
signal seen at the output for a 10V signal change between
channels.
CROSSTALK
Crosstalk is the amount of signal feedthrough from the
3 differential or 7 signal-ended OFF channels appearing at
the multiplexer output. Crosstalk is caused by the voltage
divider effect of the OFF channel. OFF resistance, and
junction capacitances in series with the R
impedances of the ON channel. Crosstalk is measured with
Node A
Node B
RD
Load
RD
A
B
(assume high load resistance) to
CD
CD
A
B
ON
and R
SOURCE