Z8L180 ZILOG [Zilog, Inc.], Z8L180 Datasheet - Page 174

• Manufacturer Part Number: Z8L180
• Description: Z8018x Family MPU
• Manufacturer: ZILOG [Zilog, Inc.]

Timer Data Register 0L (TMDR0L: 0CH)
Timer Data Register 0H (TMDR0H: 0DH)
Bit
Bit/Field
R/W
Reset
Note: R = Read W = Write X = Indeterminate ? = Not Applicable
Bit
Bit/Field
R/W
Reset
Note: R = Read W = Write X = Indeterminate ? = Not Applicable
7
7
Timer Reload Register (RLDR: I/O Address = CH0: 0EH,
0FH, CHI, 16H, 17H)
PRT0 and PRT1 each contain 16-bit Timer Reload Registers (RLDR).
RLDR0 and RLDR1 are each accessed as low and high byte registers
(RLDR0H, RLDR0L and RLDR1H, RLDR1L). During RESET, RLDR0
and RLDR1 are set to
When the TMDR counts down to
contents of RLDR.
6
6
5
5
FFFFH
4
4
Timer Data
Timer Data
R/W
R/W
0
0
0
, it is automatically reloaded with the
3
3
2
2
M PU Us e r M anual
UM005001-ZMP0400
Z 8018x Fam il y
1
1
0
0
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