ADV212 AD [Analog Devices], ADV212 Datasheet - Page 12

• Manufacturer Part Number: ADV212
• Description: JPEG 2000 Video Codec
• Manufacturer: AD [Analog Devices]

ADV212
EXTERNAL DMA MODE—FIFO WRITE, BURST MODE
Table 8.
Parameter
DREQ Pulse Width
WE to DREQ Deassert (DR × PULS = 0)
DACK to WE Setup
Data Setup
Data Hold
WE Assert Pulse Width
WE Deassert Pulse Width
WEDeassert to Next DREQ
WE Deassert to DACK Deassert
1
2
Applies to assigned DMA channel, if EDMOD0 or EDMOD1 <14:11> is programmed to a nonzero value.
For a definition of JCLK, see Figure 32.
HDATA
HDATA
HDATA
DREQ
DACK
DREQ
DACK
WEFB
DREQ
DACK
1
WE
WE
DREQ
Figure 13. Burst Write Cycle for DREQ /DMA Mode for Assigned DMA Channel
Figure 14. Burst Write Cycle for DREQ /DMA Mode for Assigned DMA Channel
t
(EDMOD0/EDMOD1 <14:11> Not Programmed to a Value of 0000)
t
t
PULSE
t
t
t
SU
SU
SU
t
t
DACKSU
DACKSU
DACKSU
DREQRTN
DREQRTN
(EDMOD0/EDMOD1 <14:11> Programmed to a Value of 0000)
0
0
0
t
t
t
HD
HD
HD
Figure 15. Burst Write Cycle for Fly-By DMA Mode
1
1
1
Mnemonic
DREQ
t
t
t
t
WE
WE
t
t
DREQ RTN
DACK SU
SU
HD
DREQ WAIT
WE_DACK
Rev. 0 | Page 12 of 44
LO
HI
PULSE
WE
WE
WE
LO
LO
LO
13
13
13
Min
1 JCLK
2.5 JCLK
0
2.5
2
1.5 JCLK
1.5 JCLK
2.5 JCLK
0
14
14
14
WE
t
WE
WE
WE_DACK
t
t
2
WE_DACK
WE_DACK
HI
HI
HI
15
15
15
Typ
t
t
Max
15 JCLK
3.5 × JCLK + 7.5
4.5 × JCLK + 9.0
DREQWAIT
t
DREQWAIT
DREQWAIT
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns