AIC1574 AIC [Analog Intergrations Corporation], AIC1574 Datasheet - Page 11
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AIC1574
Manufacturer Part Number
AIC1574
Description
5-bit DAC, Synchronous PWM Power Regulator with Triple Linear Controllers
Manufacturer
AIC [Analog Intergrations Corporation]
Datasheet
1.AIC1574.pdf
(20 pages)
Pin 12:SS:
Pin 13: FAULT/RT: Frequency adjustment pin.
Pin14:
Pin15:
Pin 16: VAUX:
Soft-start pin. Connect a ca-
pacitor from this pin to ground.
This capacitor, along with an
internal 25 A (typically) cur-
rent source, sets the soft-start
interval of the converter. Pulling
this pin low will shut down the
IC.
Connecting a resistor (RT)
from this pin to GND, increas-
ing the frequency. Connecting
a resistor (RT) from this pin to
VCC, decreasing the frequen-
cy by the following figure (Fig.
4).
This pin is 1.26V during normal
operation, but it is pulled to
VCC in the event of an over-
voltage or over-current condition.
GND
pulled to VCC,
where
VSEN4:
the 1.8V linear regulator’s output.
This pin is monitored for under-
voltage events.
DRIVE4:
the Gate of the external N-MOS to
drive for the 1~8V power.
This pin provides boost current for
the linear regulator’s output. The
voltage at this pin is also moni-
tored for power-on-reset purpose.
f
f
f
f
0
0
f is free run frequency.
0
1
1
VCC
25
R
Connect this pin to
Connect this pin to
.
T
2
5
K
R
. 1
, R
T
26
T
V
pulled to
,
R
T
Pin 18: DRIVE3: Connect this pin to the Gate of
Pin 20: NC:
Pin 21: FB:
Pin 22: VSEN1: Converter output voltage sense
Pin 23: OCSET:Current limit sense pin. Connect
Pin 24:PGND:
Pin 17: GND:
Pin 19: VSEN3:
Signal GND for IC. All voltage lev-
els are measured with respect to
this pin.
the external N-MOS for providing
1.5V power to GTL bus.
the 1.5V linear regulator’s output.
This pin is monitored for under-
voltage events.
Not Connected.
The error amplifier inverting input
pin.
pin. Connect this pin to the con-
verter output. The PGOOD and
OVP comparator circuits use
this signal to report output volt-
age status and for over-voltage
protection function.
a resistor R
to the drain of the external high-
side N-MOSFET. R
ternal 200 A
(I
MOSFET on-resistance (R
set the over-current trip point
according to the following equa-
tion:
Driver power GND pin. PGND
should be connected to a low
impedance
close
source.
I
PEAK
OCSET
), and the upper N-
to
I
OCSET
OCSET
Connect this pin to
lower
R
ground
DS(ON)
current
R
AIC1574
OCSET
from this pin
OCSET
N-MOSFET
plane
, an in-
source
DS(ON)
11
in
)