SAF82526 INFINEON [Infineon Technologies AG], SAF82526 Datasheet - Page 97
SAF82526
Manufacturer Part Number
SAF82526
Description
Data Communications ICs
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet
1.SAF82526.pdf
(126 pages)
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Receive Address Byte Low Register 1 (READ/WRITE)
RAL1
The general function (READ/WRITE) and the meaning or contents of this register depends on
the selected operating mode:
Receive Address Byte Low Register 2 (WRITE)
RAL2
Value of the second individual programmable low address byte. If a one byte address field is
selected, RAL2 is recognized as RESPONSE according to X.25 LAPB protocol.
Semiconductor Group
– –
–
–
–
–
Auto-/non-auto mode (16-bit address) – WRITE only:
RAL1 can be programmed with the value of the first individual low address byte.
Auto-/non-auto mode (8-bit address) – WRITE only:
According to X.25 LAPB protocol, the address in RAL1 is recognized as COMMAND
address.
Transparent mode 1 (high byte address recognition) – READ only:
RAL1 contains the byte following the high byte of the address in the receive frame (i.e.
the second byte after the opening flag).
Transparent mode 0 (no address recognition) – READ only:
RAL1 contains the first byte after the opening flag (first byte of received frame).
Extended transparent modes 0, 1 – READ only:
RAL1 contains the actual data byte currently assembled at the R D pin, by passing the
HDLC receiver (fully transparent reception without HDLC framing).
7
7
RAL1
RAL2
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