A6250X16W EMMICRO [EM Microelectronic - MARIN SA], A6250X16W Datasheet - Page 6

• Manufacturer Part Number: A6250X16W
• Description: High Efficiency Linear Power Supply with Accurate Power Surveillance and Software Monitoring
• Manufacturer: EMMICRO [EM Microelectronic - MARIN SA]

6
Pin Description
Functional Description
Voltage Regulator
The A6250 has a 5 V ± 3%, 250 mA, low drop out volt age
reg u la tor. The low sup ply cur rent (typ. 175 µA) makes the
A6250 par tic u larly suited to au to mo tive sys tems then re -
main en er gized 24 hours a day. The in put volt age range is
2.3 V to 40 V for op er a tion and the in put pro tec tion in -
cludes both re verse bat tery (20 V be low ground) and load
dump (pos i tive tran sients up to 60 V). There is no re verse
cur rent flow from the OUTPUT to the INPUT when the
INPUT equals V
which need to im ple ment (with ca pac i tance) a min i mum
power sup ply hold-up time in the event of power fail ure. To
achieve good load reg u la tion a 22 µF ca pac i tor (or
greater) is needed on the INPUT (see Fig. 8). Tan ta lum or
alu minium electrolytics are ad e quate for the 22 µF ca pac i -
tor; film types will work but are rel a tively ex pen sive. Many
alu minium electrolytics have elec tro lytes that freeze at
about -30°C, so tantalums are rec om mended for op er a -
tion be low -25°C. The im por tant pa ram e ters of the 22 µF
ca pac i tor are an ef fec tive se ries resistance of
res o nant fre quency above 500 kHz.
A 10 µF ca pac i tor (or greater) and a 100 nF ca pac i tor are
re quired on the OUTPUT to pre vent os cil la tions due to in -
sta bil ity. The spec i fi ca tion of the 10 µF ca pac i tor is as per
the 22 µF ca pac i tor on the INPUT (see pre vi ous para -
graph).
The A6250 will re main sta ble and in reg u la tion with no ex -
ter nal load and the drop out volt age is typ i cally con stant as
the in put volt age fall to be low its min i mum level (see Ta ble
2). These fea tures are es pe cially im por tant in CMOS RAM
keep-alive ap pli ca tions.
Care must be taken not to ex ceed the max i mum junc tion
tem per a ture (+125°C). The power dis si pa tion within the
A6250 is given by the for mula:
The max i mum con tin u ous power dis si pa tion at a given
tem per a ture can be cal cu lated us ing the for mula:
where Rth(j-a) is the ther mal re sis tance from the junc tion
to the am bi ent and is spec i fied in Ta ble 2. Note the R
given in Ta ble 2 as sumes that the pack age is sol dered to a
PCB. The above for mula for max i mum power dis si pa tion
Pin
2
3
4
5
12
13
14
15
P
P
MAX
TOTAL
= (125°C - T
= (V
EN
RES
TCL
V
INPUT
OUTPUT
R
V
Name
SS
IN
INPUT
SS
. This fea ture is im por tant for sys tems
- V
A
Push-pull active low enable output
Open drain active low reset output.
RES must be pulled up to V
even if unused
Watchdog timer clear input signal
GND terminal
Voltage regulator input
Voltage regulator output
R
Voltage comparator input
) / Rth(j-a)
Function
OUTPUT
EXT
input for RC oscillator tuning
) . I
OUTPUT
+ (V
INPUT
OUTPUT
) . I
5
SS
Ta ble 5
and a
th(j-a)
as sumes a con stant load (ie.
mal re sis tance for a sin gle pulse is much lower than the
con tin u ous value.
V
The power-on re set and the power-down re set are gen er -
ated as a re sponse to the ex ter nal volt age level on the V
in put. The ex ter nal volt age level is typ i cally ob tained from
a volt age di vider as shown in Fig. 8. The user uses the ex -
ter nal volt age di vider to set the de sired thresh old level for
power-on re set and power-down re set in his sys tem. The
in ter nal com para tor ref er ence volt age is typ i cally 1.52 V.
At power-up the re set out put (RES) is held low (see Fig. 4).
Af ter INPUT reaches 3.36 V (and so OUTPUT reaches at
least 3 V) and V
put is held low for an ad di tional power-on-reset (POR) de -
lay which is equal to the watch dog time T
ms with an ex ter nal re sis tor of 123 k con nected at R pin).
The POR de lay pre vents re peated tog gling of RES even if
V
POR de lay al lows the mi cro pro ces sor’s crys tal os cil la tor
time to start and sta bi lize and en sures cor rect rec og ni tion
of the re set sig nal to the mi cro pro ces sor.
The RES out put goes ac tive low gen er at ing the
power-down re set when ever V
si tiv ity or re ac tion time of the in ter nal com para tor to the
volt age level on V
Timer Programming
The on-chip os cil la tor with an ex ter nal re sis tor R
nected be tween the R pin and V
user to ad just the power-on re set (POR) de lay, watch dog
time T
dows as well as the watch dog re set pulse width (T
With R
- Power-on re set de lay:
- Watchdog time:
- Closed window:
- Open window:
- Watchdog reset:
Note the cur rent con sump tion in creases as the fre quency
in creases.
IN
IN
and the INPUT volt age drops out and re cov ers. The
Monitoring
WD
EXT
and with this also the closed and open time win -
= 123 k typ i cal val ues are:
IN
be comes greater than V
IN
is typ i cally 5 µs.
T
T
T
T
T
POR
WD
CW
OW
WDR
IN
100 s). The tran sient ther -
= 100 ms
= 100 ms
= 80 ms
= 40 ms
= 2.5 ms
falls be low V
SS
(see Fig. 8) al lows the
A6250
REF
WD
, the RES out -
(typ i cally 100
REF
. The sen -
WD
EXT
/ 40).
con -
IN