LMP7701_06 NSC [National Semiconductor], LMP7701_06 Datasheet - Page 15

• Manufacturer Part Number: LMP7701_06
• Description: Precision, CMOS Input, RRIO, Wide Supply Range Amplifiers
• Manufacturer: NSC [National Semiconductor]

Application Information
LMP7701/LMP7702/LMP7704
The LMP7701/LMP7702/LMP7704 are single, dual, and
quad low offset voltage, rail-to-rail input and output precision
amplifiers each with CMOS input stage and wide supply
voltage range of 2.7V to 12V. The LMP7701/LMP7702/
LMP7704 have a very low input bias current of only
at room temperature.
The wide supply voltage range of 2.7V to 12V over the
extensive temperature range of −40˚C to 125˚C makes the
LMP7701/LMP7702/LMP7704 excellent choices for low volt-
age precision applications with extensive temperature re-
quirements.
The LMP7701/LMP7702/LMP7704 have only
cal input referred offset voltage and this offset is guaranteed
to be less than
dual and quad, over temperature. This minimal offset voltage
allows more accurate signal detection and amplification in
precision applications.
The low input bias current of only
input referred voltage noise of 9 nV/
LMP7702/LMP7704 superiority for use in sensor applica-
tions. Lower levels of noise introduced by the amplifier mean
better signal fidelity and a higher signal-to-noise ratio.
National Semiconductor is heavily committed to precision
amplifiers and the market segment they serve. Technical
support and extensive characterization data is available for
sensitive applications or applications with a constrained error
budget.
The LMP7701 is offered in the space saving 5-Pin SOT23
package, the LMP7702 comes in the 8-pin MSOP, and the
LMP7704 is offered in the 14-Pin TSSOP package. These
small packages are ideal solutions for area constrained PC
boards and portable electronics.
CAPACITIVE LOAD
The LMP7701/LMP7702/LMP7704 can each be connected
as a non-inverting unity gain follower. This configuration is
the most sensitive to capacitive loading.
The combination of a capacitive load placed on the output of
an amplifier along with the amplifier’s output impedance
creates a phase lag which in turn reduces the phase margin
of the amplifier. If the phase margin is significantly reduced,
the response will be either underdamped or it will oscillate.
In order to drive heavier capacitive loads, an isolation resis-
tor, R
resistor, the capacitive load is isolated from the amplifier’s
output, and hence, the pole caused by C
feedback loop. The larger the value of R
the output voltage will be. If values of R
large, the feedback loop will be stable, independent of the
value of C
output swing and reduced output current drive.
ISO
, in Figure 1 should be used. By using this isolation
L
. However, larger values of R
±
500 µV for the single and
±
200 fA along with the low
ISO
ISO
L
give the LMP7701/
ISO
is no longer in the
, the more stable
result in reduced
±
±
are sufficiently
520 µV for the
37 µV of typi-
±
200 fA
15
INPUT CAPACITANCE
CMOS input stages inherently have low input bias current
and higher input referred voltage noise. The LMP7701/
LMP7702/LMP7704 enhance this performance by having
the low input bias current of only
low input referred voltage noise of 9 nV/
achieve this a larger input stage has been used. This larger
input stage increases the input capacitance of the LMP7701/
LMP7702/ LMP7704. The typical value of this input capaci-
tance, C
The input capacitance will interact with other impedances
such as gain and feedback resistors, which are seen on the
inputs of the amplifier, to form a pole. This pole will have little
or no effect on the output of the amplifier at low frequencies
and DC conditions, but will play a bigger role as the fre-
quency increases. At higher frequencies, the presence of
this pole will decrease phase margin and will also cause gain
peaking. In order to compensate for the input capacitance,
care must be taken in choosing the feedback resistors. In
addition to being selective in picking values for the feedback
resistor, a capacitor can be added to the feedback path to
increase stability.
The DC gain of the circuit shown in Figure 2 is simply
–R
For the time being, ignore C
Figure 2 can be calculated as follows:
2
/R
FIGURE 2. Compensating for Input Capacitance
1
.
IN
FIGURE 1. Isolating Capacitive Load
, for the LMP7701/LMP7702/LMP7704 is 25 pF.
F
. The AC gain of the circuit in
±
200 fA, as well as, a very
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. In order to
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