Z53C80SCSI ZILOG [Zilog, Inc.], Z53C80SCSI Datasheet - Page 27
Z53C80SCSI
Manufacturer Part Number
Z53C80SCSI
Description
SMALL COMPUTER SYSTEM INTERFACE (SCSI)
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
1.Z53C80SCSI.pdf
(40 pages)
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PS97SCC0200
Z
Notes:
[1] Write Enable is the occurrence of /WR and /DACK.
[2] /EOP, /WR, and /DACK must be concurrently Low for at least T7 for
AC CHARACTERISTICS
DMA Write Initiator Send Cycle Table
ILOG
No
1
2
3
4
5
6
7
8
9
10
11
12
13
proper recognition of the /EOP pulse.
Description
DRQ Low from /DACK Low
/DACK High to DRQ High
Write Enable Width
/DACK Hold from End of /WR
Data Setup to End of Write Enable
Data Hold Time from End of /WR
Width of /EOP Pulse
/REQ Low to /ACK Low
/REQ High to DRQ High
/DACK High to /ACK High
/WR High to Valid SCSI Data
Data Hold from Write Enable
Data Setup to /ACK Low
[1]
[2]
[1]
[1]
Min
30
50
50
25
50
15
55
0
Max
60
90
70
90
50
Z53C80 SCSI
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
27
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