HCPL-5200-100 HP [Agilent(Hewlett-Packard)], HCPL-5200-100 Datasheet - Page 8

• Manufacturer Part Number: HCPL-5200-100
• Description: Hermetically Sealed, Low IF, Wide VCC, Logic Gate Optocouplers
• Manufacturer: HP [Agilent(Hewlett-Packard)]

Typical Characteristics (cont’d.)
All typical values are at T
Notes:
10. Zero-bias capacitance measured between the LED anode and cathode.
11. Standard parts receive 100% testing at 25 C (Subgroups 1 and 9). SMD, Class H and Class K parts receive 100% testing at 25, 125,
12. Parameters are tested as part of device initial characterization and after design and process changes. Parameters guaranteed to limits
Figure 1. Typical Logic Low Output
Voltage vs. Temperature.
Single Channel Product Only
Dual and Quad Channel Products Only
1. Peak Forward Input Current pulse width < 50 s at 1 KHz maximum repetition rate.
2. Each channel of a multichannel device.
3. Duration of output short circuit time not to exceed 10 ms.
4. All devices are considered two-terminal devices: measured between all input leads or terminals shorted together and all output leads
5. This is a momentary withstand test, not an operating condition.
6. CM
7. t
8. Measured between each input pair shorted together and all output connections for that channel shorted together.
9. Measured between adjacent input pairs shorted together for each multichannel device.
Output Enable Time to Logic High
Output Enable Time to Logic Low
Output Disable Time from Logic High
Output Disable Time from Logic Low
Input-Input Insulation Leakage Current
Resistance (Input-Input)
Capacitance (Input-Input)
or terminals shorted together.
< 0.8 V). CM
high state (V
of the output pulse. The t
point on the trailing edge of the output pulse.
and –55 C (Subgroups 1 and 9, 2 and 10, 3 and 11, respectively).
specified for all lots not specifically tested.
PHL
L
propagation delay is measured from the 50% point on the leading edge of the input pulse to the 1.3 V point on the leading edge
is the maximum rate of rise of the common mode voltage that can be sustained with the output voltage in the logic low state (V
O
H
Parameter
> 2.0 V).
is the maximum rate of fall of the common mode voltage that can be sustained with the output voltage in the logic
PLH
A
propagation delay is measured from the 50% point on the trailing edge of the input pulse to the 1.3 V
= 25 C, V
CC
= 5 V , I
Symbol Typ.
t
t
t
t
C
R
PZH
PHZ
PZL
PLZ
I
I-I
I-I
I-I
F(ON)
= 5 mA, unless otherwise specified.
10
0.5
1.5
30
30
45
55
Figure 2. Typical Logic High Output
Current vs. Temperature.
13
Units
nA
pF
ns
ns
ns
ns
RH = 45%, T
V
V
f = 1 MH
I-I
I-I
Test Conditions
= 500 V, t = 5 s
= 500 V
8
A
= 25 C,
Fig.
8
8
8
8
Notes
9
9
9
O