HCPL-5300-100 HP [Agilent(Hewlett-Packard)], HCPL-5300-100 Datasheet - Page 7

• Manufacturer Part Number: HCPL-5300-100
• Description: Intelligent Power Module and Gate Drive Interface Hermetically Sealed Optocouplers
• Manufacturer: HP [Agilent(Hewlett-Packard)]

Switching Specifications (R
Over recommended operating conditions:
(T
otherwise specified.
*All typical values at 25 C, V
Notes:
10. Common mode transient immunity in a Logic Low level is the maximum tolerable dV
11. Pulse Width Distortion (PWD) is defined as the difference between t
12. Standard parts receive 100% testing at 25 C (Subgroups 1 and 9). Hi-Rel and SMD parts receive 100% testing at 25 C, +125 C,
13. Parameters are tested as part of device initial characterization and after design and process changes. Parameters are guaranteed
1. CURRENT TRANSFER RATIO in percent is defined as the ratio of output collector current (I
2. Device considered a two-terminal device: Pins 1, 2, 3 and 4 shorted together and Pins 5, 6, 7 and 8 shorted together.
3. Pulse: f = 20 kHz, Duty Cycle = 10%
4. The internal 20 k
5. Due to the tolerance of the internal resistor, and since propagation delay is dependent on the load resistor value, performance can
6. The R
7. Use of a 0.1 F bypass capacitor connected between pins 5 and 8 can improve performance by filtering power supply line noise.
8. The difference in t
9. Common mode transient immunity in a Logic High level is the maximum tolerable dV
Propagation
Delay Time to
Low Output
Level
Propagation
Delay Time to
High Output
Level
Pulse Width
Distortion
Propagation
Delay
Difference
Between Any
Two Parts
Output High
Level Common
Mode Transient
Immunity
Output Low
Level Common
Mode Transient
Immunity
Power Supply
Rejection
A
(I
be improved by using an external 20 k
resistance, see Figure 8.
Specifications section.)
assure that the output will remain in a Logic High state (i.e., V
assure that the output will remain in a Logic Low state (i.e., V
and -55 C (Subgroups 1 and 9, 2 and 10, 3 and 11 respectively).
to limits specified for all lots not specifically tested.
Parameter
= -55 C to +125 C, V
F
) times 100.
L
= 20 k , C
PLH
L
Symbol Subgrps.
resistor can be used by shorting pins 6 and 7 together.
|CM
|CM
= 100 pF represents a typical IPM (Intelligent Power Module) load.
t
PWD
PSR
t
t
t
PLH
and t
PHL
PLH
PHL
CC
H
L
-
|
|
= 15 V.
PHL
CC
= +4.5 V to 30 V, I
between any two parts under the same test condition. (See IPM Dead Time and Propagation Delay
Group A
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
L
1% load resistor. For more information on how propagation delay varies with load
[12]
= Internal Pull-up)
Min. Typ.* Max. Units
-225 150
220
20
F(ON)
185
415
150
1.0
10
10
= 10 mA to 20 mA, V
O
O
500
750
600
650
< 1.0 V).
> 3.0 V).
PLH
kV/ s I
kV/ s I
V
and t
ns
ns
ns
ns
P-P
PHL
I
V
V
C
V
V
Square Wave, t
> 5 ns, no bypass
capacitors.
V
V
for any given device.
F(on)
F
F
Test Conditions
F(off)
CC
O
O
L
THLH
THHL
= 16 mA
= 0 mA, V
> 3.0 V C
< 1.0 V
= 100 pF,
CM
= 15.0 V,
CM
= 10 mA,
F(OFF)
/dt of the common mode pulse, V
= 0.8 V,
/dt of the common mode pulse, V
= 2.0 V
= 1.5 V
7
O
) to the forward LED input current
= -5 V to 0.8 V) unless
V
T
CC
CM
A
L
RISE
= 100 pF,
= 25 C
= 15.0 V,
= 1000
, t
FALL
6, 21
5, 8,
Fig.
CM
CM
, to
, to
Note
3, 4,
5, 6,
11
10
7
8
9
7