ISD-T360 ETC [List of Unclassifed Manufacturers], ISD-T360 Datasheet - Page 34

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ISD-T360

Manufacturer Part Number
ISD-T360
Description
VoiceDSP Digital Speech Processor with Master/Slave, Full-Duplex Speakerphone, Multiple Flash and ARAM/DRAM Support
Manufacturer
ETC [List of Unclassifed Manufacturers]
Datasheet
1.
2.
3.
1-26
Memory is disabled; otherwise A0-A15.
This cycle may be either TI (Idle) or T1 of any non-DRAM bus cycle. If the next bus cycle is to DRAM, T3 is followed by
three TI (Idle) cycles.
An external device can drive data from T2W3 to T3.
A0-A10 in the IRE environment, when Expansion
D2/RA11
CTTL
RAS
CAS
D0-1,
D3-7
A0-10
A0-15
(Note 1)
DWE
or
t
t
t
Df
Df
Av
TI
t
Av
Figure 1-26: ARAM/DRAM Power-Down Refresh Cycle Timing
t
t
T1
RASa
RASh
T2W1
Row
RA11
T2W2
Figure 1-27: DRAM Read Cycle Timing
t
t
Av
Ah
t
T2W3
Df
t
t
CASa
CASh
(Note 3)
(Note 3)
6xT2W
Column
t
t
t
t
T2
RASia
RASh
CASia
CASh
t
t
Data In
DIs
DIs
D2 In
T3
t
t
DIh
DIh
TI
t
Ah
(Note 2)
TI
TI
T1
Voice Solutions in Silicon
T2W1
RA11
1—HARDWARE
T2W2 T2W3

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