ADG739 AD [Analog Devices], ADG739 Datasheet - Page 4

• Manufacturer Part Number: ADG739
• Description: CMOS, Low-Voltage, 3-Wire Serially-Controlled, Matrix Switches
• Manufacturer: AD [Analog Devices]

TIMING CHARACTERISTICS
Parameter
f
t
t
t
t
t
t
t
t
t
NOTES
1
2
3
Specifications subject to change without notice.
ADG738/ADG739
SCLK
See Figure 1.
All input signals are specified with tr = tf = 5 ns (10% to 90% of V
C
1
2
3
4
5
6
7
8
9
3
L
= 20 pF, R
L
= 1 kΩ.
DOUT
SCLK
SYNC
Limit at T
30
33
13
13
0
5
4.5
0
33
20
DIN
NOTE
1
DATA FROM LAST WRITE CYCLE
t
8
MIN
, T
DB7
DB7
MAX
t
t
9
1
1, 2
4
t
5
(V
t
6
DD
= 2.7 V to 5.5 V. All specifications –40 C to +85 C, unless otherwise noted.)
DD
Unit
MHz max
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
) and timed from a voltage level of (V
t
2
t
1
t
3
DB0
DB0
t
1
Conditions/Comments
SCLK Cycle Frequency
SCLK Cycle Time
SCLK High Time
SCLK Low Time
SYNC to SCLK Active Edge Setup Time
Data Setup Time
Data Hold Time
SCLK Falling Edge to SYNC Rising Edge
Minimum SYNC High Time
SCLK Rising Edge to DOUT Valid
7
IL
+ V
IH
)/2.