ADG3242 AD [Analog Devices], ADG3242 Datasheet - Page 4

• Manufacturer Part Number: ADG3242
• Description: 2.5 V/3.3 V, 2-Bit, Common Control Level Translator Bus Switch
• Manufacturer: AD [Analog Devices]

ADG3242
V
GND
V
V
I
I
I
V
R
C
C
C
I
t
t
t
Max Data Rate
Channel Jitter
I
CC
PLH
PZH
PHZ
OZ
OL
CC
INH
INL
P
R
I
ON
X
X
IN
CC
ON
OFF
ON
, t
, t
, t
PHL
PZL
PLZ
Positive Power Supply Voltage.
Ground (0 V) Reference.
Minimum Input Voltage for Logic 1.
Maximum Input Voltage for Logic 0.
Input Leakage Current at the Control Inputs.
OFF State Leakage Current. It is the maximum leakage current at the switch pin in the OFF state.
ON State Leakage Current. It is the maximum leakage current at the switch pin in the ON state.
Maximum Pass Voltage. The maximum pass voltage relates to the clamped output voltage of an NMOS device when
the switch input voltage is equal to the supply voltage.
Ohmic Resistance Offered by a Switch in the ON State. It is measured at a given voltage by forcing a specified
amount of current through the switch.
ON Resistance Match between any two channels, i.e., R
OFF Switch Capacitance.
ON Switch Capacitance.
Control Input Capacitance. This consists of BE and SEL.
Quiescent Power Supply Current. This current represents the leakage current between the V
It is measured when all control inputs are at a logic high or low level and the switches are OFF.
Extra power supply current component for the EN control input when the input is not driven at the supplies.
Data Propagation Delay through the Switch in the ON State. Propagation delay is related to the RC time constant
R
Bus Enable Times. These are the times taken to cross the V
in response to the control signal, BE.
Bus Disable Times. These are the times taken to place the switch in the high impedance OFF state in response to
the control signal. They are measured as the time taken for the output voltage to change by V from the original
quiescent level, with reference to the logic level transition at the control input. (Refer to Figure 3 for enable and
disable times.)
Maximum Rate at which Data Can Be Passed through the Switch.
Peak-to-Peak Value of the Sum of the Deterministic and Random Jitter of the Switch Channel.
ON
× C
L
, where C
L
is the load capacitance.
TERMINOLOGY
–4–
ON
max to R
T
voltage at the switch output when the switch turns on
ON
min.
CC
and ground pins.
REV. 0