TC74A0-33VAT MICROCHIP [Microchip Technology], TC74A0-33VAT Datasheet - Page 7

• Manufacturer Part Number: TC74A0-33VAT
• Description: Tiny Serial Digital Thermal Sensor
• Manufacturer: MICROCHIP [Microchip Technology]

3.0
3.1
The
information from its onboard solid-state sensor with a
resolution of ±1°C. It stores the data in an internal
register which is read through the serial port. The
system interface is a slave SMBus. The temperature
data can be read at any time through the SMBus port.
Eight SMBus addresses are programmable for the
TC74, which allows for a multi-sensor configuration.
Also, there is low power Standby mode when
temperature acquisition is suspended.
3.1.1
The TC74 allows the host to put it into a low power (I
= 5µA, typical) Standby mode. In this mode, the A/D
converter is halted and the temperature data registers
are frozen. The SMBus port operates normally.
Standby mode is enabled by setting the SHDN bit in the
CONFIG register. Table 3-1 summarizes this operation.
TABLE 3-1:
3.1.2
The TC74 is internally programmed to have a default
SMBus address value of 1001 101b. Seven other
addresses are available by custom order (contact
factory).
3.2
The Serial Clock input (SCL) and bi-directional data
port (SDA) form a 2-wire bi-directional serial port for
programming and interrogating the TC74. The
following conventions are used in this bus architecture:
©
SHDN Bit
2002 Microchip Technology Inc.
0
1
TC74
DETAILED DESCRIPTION
Functional Description
Serial Port Operation
STANDBY MODE
SMBUS SLAVE ADDRESS
acquires
STANDBY MODE OPERATION
and
Operating Mode
Standby
Normal
converts
temperature
DD
TABLE 3-2:
All transfers take place under control of a host, usually
a CPU or microcontroller, acting as the Master, which
provides the clock signal for all transfers. The TC74
always operates as a Slave. The serial protocol is
illustrated in Figure 3-1 All data transfers have two
phases; all bytes are transferred MSB first. Accesses
are initiated by a START condition, followed by a device
address byte and one or more data bytes. The device
address byte includes a Read/Write selection bit. Each
access must be terminated by a STOP Condition. A
convention called Acknowledge (ACK) confirms receipt
of each byte. Note that SDA can change only during
periods when SCL is LOW (SDA changes while SCL is
HIGH are reserved for START and STOP Conditions).
Transmitter
NOT Busy
Data Valid
Receiver
Master
START
STOP
Slave
Term
Busy
ACK
The device sending data to the bus.
The device receiving data from the bus.
The device which controls the bus: initiating
transfers (START), generating the clock, and
terminating transfers. (STOP)
The device addressed by the master.
A unique condition signaling the beginning of
a transfer indicated by SDA falling (High-Low)
while SCL is high.
A unique condition signaling the end of a
transfer indicated by SDA rising (Low-High)
while SCL is High.
A Receiver acknowledges the receipt of each
byte with this unique condition. The Receiver
drives SDA low during SCL high of the ACK
clock-pulse. The Master provides the clock
pulse for the ACK cycle.
Communication is not possible because the
bus is in use.
When the bus is idle, both SDA and SCL will
remain high.
The state of SDA must remain stable during
the High period of SCL in order for a data bit
to be considered valid. SDA only changes
state while SCL is low during normal data
transfers. (See START and STOP condi-
tions.)
SERIAL BUS CONVENTIONS
Explanation
DS21462B-page 7
TC74