LM3687TL-1813 NSC [National Semiconductor], LM3687TL-1813 Datasheet - Page 19

• Manufacturer Part Number: LM3687TL-1813
• Description: Step-Down DC-DC Converter with Integrated Low Dropout Regulator and Startup Mode
• Manufacturer: NSC [National Semiconductor]

off in case a thermal shutdown is initiated. If the DC-DC con-
verter operates in PWM mode, the PMOS is turned off in case
of a thermal shutdown.
The Thermal-Overload Protection is designed to protect the
LM3687 in the event of a fault condition. For normal, contin-
uous operation, do not exceed the absolute maximum junc-
tion temperature rating of T
Maximum Ratings).
REVERSE CURRENT PATH
There are two body diodes at the switch pin of the DC-DC
converter. It is not allowed to pull the switch pin above
V
On the main linear regulator there is a bulk switching feature
in place preventing the parasitic diode structures from con-
ducting current. This feature is only active as long as any of
the regulators is enabled.
For the startup LDO, V
EVALUATION BOARDS
For availability of evaluation boards please refer to the Prod-
uct Folder of LM3687 at www.national.com. For information
regarding evaluation boards, please refer to Application Note:
AN-1647.
Micro SMD PACKAGE ASSEMBLY AND USE
Use of the micro SMD package requires specialized board
layout, precision mounting and careful re-flow techniques, as
detailed in National Semiconductor Application Note 1112.
Refer to the section "Surface Mount Technology (SMD) As-
sembly Considerations". For best results in assembly, align-
ment ordinals on the PC board should be used to facilitate
placement of the device. The pad style used with micro SMD
package must be the NSMD (non-solder mask defined) type.
This means that the solder-mask opening is larger than the
pad size. This prevents a lip that otherwise forms if the sol-
dermask and pad overlap, from holding the device off the
surface of the board and interfering with mounting. See Ap-
plication Note 1112 for specific instructions how to do this.
The 9-Bump package used for LM3687 has 300 micron solder
balls and requires 275 micron pads for mounting on the circuit
board. The trace to each pad should enter the pad with a 90°
entry angle to prevent debris from being caught in deep cor-
ners. Initially, the trace to each pad should not exceed 183
micron, for a section approximately 183 micron long or longer,
as a thermal relief. Then each trace should neck up or down
to its optimal width. The important criteria is symmetry. This
ensures the solder bumps on the LM3687 re-flow evenly and
that the device solders level to the board. In particular, special
attention must be paid to the pads for bumps A1, A2, C1 and
B3, because PGND, SGND, V
connected to large copper planes, inadequate thermal relief
can result in late or inadequate re-flow of these bumps. The
micro SMD package is optimized for the smallest possible
size in applications with red or infrared opaque cases. Be-
cause the micro SMD package lacks the plastic encapsulation
characteristic of larger devices, it is vulnerable to light. Back-
side metallization and/or epoxy coating, along with frontside
shading by the printed circuit board, reduce this sensitivity.
However, the package has exposed die edges. In particular,
micro SMD devices are sensitive to light, in the red and in-
frared range, shining on the package’s exposed die edges.
BOARD LAYOUT CONSIDERATIONS
PC board layout is an important part of DC-DC converter de-
sign. Poor board layout can disrupt the performance of a DC-
BATT
or below PGND by more than 200mV.
OUT_LIN
must not exceed V
J
BATT
= +150°C (see Absolute
and V
IN_LIN
are typically
BATT
.
19
DC converter and surrounding circuitry by contributing to EMI,
ground bounce, and resistive voltage loss in the traces. These
can send erroneous signals to the DC-DC converter IC, re-
sulting in poor regulation or instability. Good layout for the
LM3687 can be implemented by following a few simple design
rules below. Refer to Figure 10 for top layer board layout.
1.
2.
3.
4.
5.
6.
In mobile phones, for example, a common practice is to place
the DC-DC converter on one corner of the board, arrange the
CMOS digital circuitry around it (since this also generates
noise), and then place sensitive preamplifiers and IF stages
on the diagonally opposing corner. Often, the sensitive cir-
cuitry is shielded with a metal pan and power to it is postreg-
ulated to reduce conducted noise, a good field of application
for the on-chip low-dropout linear regulator.
Place the LM3687, inductor and filter capacitor close
together and make the traces short. The traces between
these components carry relatively high switching
currents and act as antennas. Following this rule reduces
radiated noise. Special care must be given to place the
input filter capacitor very close to the V
pin. Place the output capacitor of the linear regulator
close to the output pin.
Arrange the components so that the switching current
loops curl in the same direction. During the first half of
each cycle, current flows from the input filter capacitor
through the LM3687 and inductor to the output filter
capacitor and back through ground, forming a current
loop. In the second half of each cycle, current is pulled
up from ground through the LM3687 by the inductor to
the output filter capacitor and then back through ground
forming a second current loop. Routing these loops so
the current curls in the same direction prevents magnetic
field reversal between the two half-cycles and reduces
radiated noise.
Connect the ground pins of the LM3687 and filter
capacitors together using generous component-side
copper fill as a pseudo-ground plane. Then, connect this
to the ground-plane (if one is used) with several vias. This
reduces ground-plane noise by preventing the switching
currents from circulating through the ground plane. It also
reduces ground bounce at the LM3687 by giving it a low
impedance ground connection. Route SGND to the
ground-plane by a separate trace.
Use wide traces between the power components and for
power connections to the DC-DC converter circuit. This
reduces voltage errors caused by resistive losses across
the traces.
Route noise sensitive traces, such as the voltage
feedback path (FB_DCDC), away from noisy traces
between the power components. The voltage feedback
trace must remain close to the LM3687 circuit and should
be direct but should be routed opposite to noisy
components. This reduces EMI radiated onto the DC-DC
converter’s own voltage feedback trace. A good
approach is to route the feedback trace on another layer
and to have a ground plane between the top layer and
layer on which the feedback trace is routed.
Place noise sensitive circuitry, such as radio IF blocks,
away from the DC-DC converter, CMOS digital blocks
and other noisy circuitry. Interference with noise
sensitive circuitry in the system can be reduced through
distance.
BATT
and PGND
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