LMC6582AIMX NSC [National Semiconductor], LMC6582AIMX Datasheet - Page 12
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LMC6582AIMX
Manufacturer Part Number
LMC6582AIMX
Description
Low Voltage, Rail-To-Rail Input and Output CMOS Operational Amplifier
Manufacturer
NSC [National Semiconductor]
Datasheet
1.LMC6582AIMX.pdf
(19 pages)
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4.0 Capacitive Load Tolerance
Another circuit, shown in Figure 9 , is also used to indirectly
drive capacitive loads. This circuit is an improvement to the
circuit shown Figure 7 because it provides DC accuracy as
well as AC stability. R1 and C1 serve to counteract the loss
of phase margin by feeding the high frequency component of
the output signal back to the amplifiers inverting input,
thereby preserving phase margin in the overall feedback
loop. The values of R1 and C1 should be experimentally de-
termined by the system designer for the desired pulse re-
sponse. Increased capacitive drive is possible by increasing
the value of the capacitor in the feedback loop.
The pulse response of the circuit shown in Figure 9 is shown
in Figure 10 .
5.0 Printed-Circuit-Board Layout
for High-Impedance Work
It is generally recognized that any circuit which must operate
with less than 1000 pA of leakage current requires special
layout of the PC board. When one wishes to take advantage
of the ultra-low input current of the LMC6582/4, typically 80
fA, it is essential to have an excellent layout. Fortunately, the
techniques of obtaining low leakages are quite simple. First,
the user must not ignore the surface leakage of the PC
board, even though it may sometimes appear acceptably
low, because under conditions of high humidity or dust or
contamination, the surface leakage will be appreciable.
To minimize the effect of any surface leakage, lay out a ring
of foil completely surrounding the LMC6582/4’s inputs and
the terminals of capacitors, diodes, conductors, resistors, re-
(Continued)
to Ensure DC Accuracy and AC Stability
FIGURE 9. The LMC6582 Compensated
FIGURE 10. Pulse Response of the
LMC6582 Circuit Shown in Figure 9
DS012041-12
DS012041-11
12
lay terminals, etc. connected to the op-amp’s inputs, as in
Figure 11 . To have a significant effect, guard rings should be
placed in both the top and bottom of the PC board. This PC
foil must then be connected to a voltage which is at the same
voltage as the amplifier inputs, since no leakage current can
flow between two points at the same potential. For example,
a PC board trace-to-pad resistance of 10
mally considered a very large resistance, could leak 5 pA if
the trace were a 5V bus adjacent to the pad of the input. This
would cause a 60 times degradation from the LMC6582/4’s
actual performance. However, if a guard ring is held within 5
mV of the inputs, then even a resistance of 10
cause only 0.05 pA of leakage current. See Figure 12 for
typical connections of guard rings for standard op-amp
configurations.
FIGURE 11. Example of Guard Ring in PC Board
Layout
12
, which is nor-
11
DS012041-14
would