MAX8500 MAXIM [Maxim Integrated Products], MAX8500 Datasheet - Page 9

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MAX8500

Manufacturer Part Number
MAX8500
Description
PWM Buck Converters with Bypass FET for N-CDMA/W-CDMA Handsets
Manufacturer
MAXIM [Maxim Integrated Products]
Datasheet
rent to the output filter capacitor and load until the induc-
tor current reaches the skip peak current limit. Then the
main switch turns off, and the magnetic field in the induc-
tor collapses, while current flows through the synchro-
nous rectifier to the output filter capacitor and the load.
The synchronous rectifier is turned off when the inductor
current reaches zero. The MAX8500–MAX8504 wait until
the skip comparator senses a low output voltage again.
Connect SKIP to BATT for forced-PWM operation.
Forced-PWM operation is desirable in sensitive RF and
data-acquisition applications to ensure that switching
harmonics do not interfere with sensitive IF and data-
sampling frequencies. A minimum load is not required
during forced-PWM operation since the synchronous
rectifier passes reverse-inductor current as needed to
allow constant-frequency operation with no load. Forced-
PWM operation uses higher supply current with no load
(3.3mA typ) compared to skip mode (280µA typ).
The maximum on-time can exceed one internal oscilla-
tor cycle, which permits operation at 100% duty cycle.
Near dropout, cycles may be skipped, reducing switch-
ing frequency. However, voltage ripple remains small
because the current ripple is still low. As the input volt-
age drops even further, the duty cycle increases until
the internal P-channel MOSFET stays on continuously.
Figure 2. MAX8504 Functional Diagram and Typical Operating Circuit
100% Duty-Cycle Operation and Dropout
_______________________________________________________________________________________
PWM Buck Converters with Bypass FET
INPUT 2.6V TO 5.5V
Forced-PWM Operation
10 F
SKIP
SHDN
REF
HP
1MHz
OSC
BATT
for N-CDMA/W-CDMA Handsets
COMP
PWM
R
9.1k
PGND
C
560pF
C
C
LX
Dropout voltage at 100% duty cycle is the output cur-
rent multiplied by the sum of the internal PMOS on-resis-
tance (0.35
output voltage drops by 5%, the PFET bypass LDO
(MAX8500–MAX8503) turns on and reduces the dropout
voltage. The dropout in the bypass PFET equals the
load current multiplied by the on-resistance (0.25
in parallel with the buck converter and inductor dropout
resistance.
The MAX8500–MAX8504 do not operate with battery
voltages below the UVLO threshold of 2.35V (typ). The
output remains off until the supply voltage exceeds the
UVLO threshold. This guarantees the integrity of the
output voltage regulation.
An N-channel, synchronous rectifier operates during the
second half of each switching cycle (off-time). When the
inductor current falls below the N-channel current com-
parator threshold or when the PWM reaches the end of
the oscillator period, the synchronous rectifier turns off.
This prevents reverse current from the output to the
input in pulse-skipping mode. During PWM operation,
the I
during light loads. This allows regulation with a constant
switching frequency and eliminates minimum load
requirements for fixed-frequency operation.
GND
g
m
LIMN
4.7 H
OVER-
CURRENT
PROTECTION
1.25V
OUT
threshold adjusts to permit reverse current
FB
typ) and the inductor resistance. Once the
Undervoltage Lockout (UVLO)
1.25V TO 2.5V
OR VBATT
OUTPUT
Synchronous Rectification
4.7 F
typ)
9

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