MAX8513 MAXIM [Maxim Integrated Products], MAX8513 Datasheet - Page 28

• Manufacturer Part Number: MAX8513
• Description: Wide-Input, High-Frequency, Triple-Output Supplies with Voltage Monitor and Power-On Reset
• Manufacturer: MAXIM [Maxim Integrated Products]

A third pole occurs due to the input capacitance of the
NMOS transistor’s gate, C
data sheet), and the compensation resistor (R
NPN bipolar transistor is used instead, this third pole
can be calculated from the base capacitance (C
C
zero is added to the loop from the resistor (R
capacitor (C
For good stability and transient response, first pick
C
Typical Applications Circuit, C
capacitor. Ensure that the zero formed from the ESR of
C
(calculated below). The maximum bandwidth should
also be less than the pole created by Q3’s gate capaci-
tance (Cq) and the compensation resistor (R
The following equations set the compensation zero a
decade and a half below the maximum load pole and
ensure the above constraint is met. Choose the larger
of the two values for C
MAX8513/MAX8514s’ OUT2 uses N-channel MOSFETs
as the series pass transistor to improve efficiency for
high output current by not requiring a large amount of
Wide-Input, High-Frequency, Triple-Output Supplies
with Voltage Monitor and Power-On Reset
28
C
IBO
OUT2
OUT2
A
BW
=
______________________________________________________________________________________
from the NPN data sheet). To ensure stability, a
MAX
at approximately 6.8µF/A of load current. For the
is greater than the maximum bandwidth BW
MAX
R














13
16 10
R
A
A
=
ESR COUT
=
×
(
).
MIN
g
(
10 10
g
C MAX OUT
_
C MAX
8
(
(
g
×
(
MOSFET Transistor Selection
×







C MAX
(
1 3
g
V
(
1
.
10
OUT
1
C MAX OUT
×
)
g
2
(
A
V
)
×
C
C MAX OUT
.
V
×
×
)
(
OUT
2
OUT
×
R
×
G
2
π
)
C
ESR COUT
R
V
π
C
×
2
OUT
ESR COUT
2
q
)
C
×
−
2
C R
V
+
1
C
×
R
C
A
_
(C
G C
I
OUT2
OUT MAX
g
_
2
OUT
ESR COUT
q
×
C MAX
iss
+
C
2
(
I
q
OUT MAX
2
,
_
+
2
(
from the MOSFET
1
×
I
2
is a 10µF ceramic
2
OUT MAX
×
)
G
2
+
+
(
C
1
1
2
2
)
)
)
(
)
2
×
C
)
A
g
)
OUT
).
C MAX
×
)
(
A
). If an
A







) and
)
MAX
q
×
,
=
drive current. The selected MOSFET must have the gate
threshold voltage meet the following criteria:
where V
(whichever is less), and V
voltage required to yield the on-resistance specified by
the manufacturer’s data sheet. Logic-gate MOSFETs
are recommended.
The MAX8513/MAX8514s’ OUT2 can use a less expen-
sive NPN transistor as the series pass transistor. In
selecting the appropriate NPN transistor, make sure the
beta is large enough so the regulator can provide
enough base current. The minimum beta of the transis-
tor is:
In addition, to avoid premature dropout, V
V
The pass transistors must meet specifications for cur-
rent gain (β), input capacitance, collector-emitter satu-
ration voltage, and power dissipation. The transistor’s
current gain limits the guaranteed maximum output cur-
rent to:
where I
and R12 is the pullup resistor connected between the
transistor’s base and emitter (see the Typical
Applications Circuits). In addition, to avoid premature
dropout V
transistor’s current gain increases the linear regulator’s
DC loop gain (see the Stability Requirements section),
so excessive gain destabilizes the output. Therefore,
transistors with current gain over 100 at the maximum
output current, such as Darlington transistors, are not
recommended. The transistor’s input capacitance and
input resistance also create a second pole, which could
be low enough to destabilize the LDO when the output
is heavily loaded.
The transistor’s saturation voltage at the maximum output
current determines the minimum input-to-output voltage
differential that the linear regulator supports. Alternately,
IN_MIN -
DRV3P_MIN
DRV2
V
CE_SAT
OUT2
I
OUT P
V
GS MAX
3
is equal to 7.75V or V
.
β
(
_
MIN
≤ V
=
is the minimum base-drive current
OUT3_ Transistor Selection
)
IN_MIN -



NPN-Transistor Selection
=
I
DRV P MIN
≤
I
GSMAX
OUT MAX
V
3 _
DRV
4
2
mA
V
(
OUT3
2
-
is the maximum gate
- -
V
OUT
)
R12
V
. Furthermore, the
BE
2



SUP2
β
CE_SAT
- 1.5V
≤