MAX8520 MAXIM [Maxim Integrated Products], MAX8520 Datasheet - Page 15

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MAX8520

Manufacturer Part Number
MAX8520
Description
Smallest TEC Power Drivers for Optical Modules
Manufacturer
MAXIM [Maxim Integrated Products]
Datasheet

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Take care not to exceed the positive or negative cur-
rent limit on the TEC. Refer to the manufacturer’s data
sheet for these limits.
Apply a voltage to the MAXV pin to control the maximum
differential TEC voltage. MAXV can vary from 0 to REF.
The voltage across the TEC is four times V
can be positive or negative:
Set V
GND using resistors from 10kΩ to 100kΩ. V
vary from 0 to REF.
The voltage at CTLI directly sets the TEC current. CTLI
is typically driven from the output of a temperature con-
trol loop. The transfer function relating current through
the TEC (I
where V
CTLI is centered around REF (1.50V). I
CTLI = 1.50V. When V
from OS2 to OS1. The voltages on the pins relate as
follows:
The opposite applies when V
from OS1 to OS2:
The MAX8520/MAX8521 can be placed in a power-saving
shutdown mode by driving SHDN low. When the
MAX8520/MAX8521 are shut down, the TEC is off (OS1
and OS2 decay to GND) and supply current is reduced to
2mA (typ).
ITEC is a status output that provides a voltage proportional
to the actual TEC current. V
is zero. The transfer function for the ITEC output is:
Use ITEC to monitor the cooling or heating current
through the TEC. For stability, keep the load capaci-
tance on ITEC to less than 150pF.
|V
OS1
MAXV
- V
REF
I
TEC
TEC
OS2
V
with a resistor-divider between REF and
is 1.50V and:
ITEC = (V
ITEC
) and V
| = 4 x V
= (V
V
V
= 1.50 + 8
______________________________________________________________________________________
CTLI
OS2
OS2
CTLI
MAXV
OS1
CTLI
Setting Max TEC Voltage
- V
> V
< V
is given by:
REF
Control Inputs/Outputs
ITEC
- V
OS1
OS1
> 1.50V, the current flow is
or V
CTLI
) / (10
CS
Output Current Control
(V
> V
< V
= REF when TEC current
DD
) / R
OS1
< 1.50V current flows
, whichever is lower
CS
CS
Shutdown Control
SENSE
– V
R
TEC
SENSE
Smallest TEC Power Drivers for
CS
ITEC Output
is zero when
)
MAXV
)
MAXV
and
can
The MAX8520/MAX8521 typically drive a TEC inside a
thermal-control loop. TEC drive polarity and power are
regulated based on temperature information read from a
thermistor or other temperature-measuring device to
maintain a stable control temperature. Temperature sta-
bility of ±0.01°C can be achieved with carefully selected
external components.
There are numerous ways to implement the thermal loop.
Figures 1 and 2 show designs that employ precision op
amps, along with a DAC or potentiometer to set the con-
trol temperature. The loop may also be implemented dig-
itally, using a precision A/D to read the thermistor or
other temperature sensor, a microcontroller to implement
the control algorithm, and a DAC (or filtered-PWM signal)
to send the appropriate signal to the MAX8520/MAX8521
CTLI input. Regardless of the form taken by the thermal-
control circuitry, all designs are similar in that they read
temperature, compare it to a set-point signal, and then
send an error-correcting signal to the MAX8520/
MAX8521 that moves the temperature in the appropriate
direction.
High switching frequencies and large peak currents
make PC board layout a very important part of design.
Good design minimizes excessive EMI and voltage
gradients in the ground plane, both of which can result
in instability or regulation errors. Follow these guide-
lines for good PC board layout:
1) Place decoupling capacitors as close to the IC pins
2) Keep a separate power ground plane, which is con-
3) Connect a decoupling capacitor from V
4) Connect GND and PGND_ pins together at a single
5) Keep the power loop, which consists of input
as possible.
nected to PGND1 and PGND2. PV
PGND1, and PGND2 are noisy points. Connect
decoupling capacitors from PV
directly as possible. Output capacitors C2 and C7
returns are connected to PGND plane.
Connect GND to a signal ground plane (separate
from the power ground plane above). Other V
decoupling capacitors (such as the input capacitor)
need to be connected to the PGND plane.
point, as close as possible to the chip.
capacitors, output inductors, and capacitors, as
compact and small as possible.
Applications Information
Optical Modules
PC Board Layout and Routing
DD
s to PGNDs as
DD
DD
1, PV
to GND.
DD
DD
15
2,

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