MAX8524 MAXIM [Maxim Integrated Products], MAX8524 Datasheet - Page 15

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MAX8524

Manufacturer Part Number
MAX8524
Description
2- to 8-Phase VRM 10/9.1 PWM Controllers with Precise Current Sharing and Fast Voltage Positioning
Manufacturer
MAXIM [Maxim Integrated Products]
Datasheet
Figure 4. Output-Voltage Waveform During VID On-the-Fly
Change with Load Transients
Figure 5. Clock Relationships Between the Master and Slave
Controllers
PHASE 1
PHASE 2
PHASE 3
PHASE 4
PHASE 1
PHASE 2
PHASE 3
PHASE 4
CLKOUT
CLKIN
with Precise Current Sharing and Fast Voltage
2- to 8-Phase VRM 10/9.1 PWM Controllers
______________________________________________________________________________________
EIGHT-PHASE OPERATION
MASTER IC PHASE CLOCK
SLAVE IC PHASE CLOCK
40µs
MAX8524 fig04
POWER-GOOD
OUTPUT
INDUCTOR
CURRENT
OF PH1
OUTPUT VOLTAGE
0.2V/div
PWRGD is an open-drain output that is pulled low when
the output voltage rises above the PWRGD upper
threshold or falls below the PWRGD falling threshold.
PWRGD is held low in shutdown, V
during soft-start conditions. For logic-level output volt-
ages, connect an external pullup resistor between
PWRGD and the logic power supply. A 100kΩ resistor
works well in most applications.
When the IC supply voltage (V
UVLO threshold, all PWM outputs are held low and
most internal circuitry is shut down to reduce the quies-
cent current. When EN is released and V
the internal 100kΩ resistor pulls EN to V
start is initiated. During soft-start, the output of the inter-
nal DAC ramps up at 12.5mV per step. For 6- or
8-phase operation, connect EN of two MAX8524/
MAX8525s together and drive it by an open-drain sig-
nal, as shown in Figure 6.
When the output voltage exceeds the regulation volt-
age by 225mV for the MAX8524 or 200mV for the
MAX8525, all PWM outputs are pulled low and the con-
troller is latched off. To discharge the output voltage,
the MOSFET drivers must keep the low-side MOSFETs
on and high-side MOSFETs off. The MAX8523 dual-
phase and the MAX8552 single-phase MOSFET drivers
fulfill this requirement. The latch condition can only be
cleared by cycling the input voltage (V
The MAX8524/MAX8525 feature a thermal-fault-protec-
tion circuit. When the junction temperature rises above
+150°C, an internal thermal sensor activates the shut-
down circuit to hold all PWM outputs low to disable
switching. The thermal sensor reactivates the controller
after the junction temperature cools by 15°C.
The switching frequency determines the switching loss
and the size of the power components. Higher switch-
ing frequency results in smaller external components
and more compact design. However, switching loss
and magnetic core loss are directly proportional to the
switching frequency. Select a switching frequency as a
tradeoff of the efficiency and size. The clock frequency
can be selected from Table 3.
UVLO, Output Enable (EN), and Soft-Start
Output Overvoltage Protection (OVP)
Setting the Switching Frequency
Power-Good Output (PWRGD)
Design Procedure
Positioning
Thermal Protection
CC
) is less than the
CC
CC
).
< UVLO, and
CC
CC
and soft-
> UVLO,
15

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